About this Research Topic
In the post-Moore law era, static power consumption (SPC) has emerged as a significant
impediment within the domain of computing architecture. Primarily driven by leakage currents
in increasingly miniaturized CMOS-based chips, SPC now accounts for more than half of these
devices' total power usage. In light of these challenges, non-volatile spintronic devices, which
utilize electron spin rather than charge for data processing and storage, are regarded as a
breakthrough solution potentially capable of reducing or eliminating SPC, marking a promising
divergence from conventional CMOS technologies. Significant strides have been made in this
novel field, highlighted by the commercialization of technologies such as magnetic randomaccess memory, which finds application in diverse settings from smart devices to aerospace.
However, despite their intrinsic benefits, spintronic devices still encounter several obstacles
that hamper their performance. On the material front, issues such as operation speed, switching
current density, tunneling magnetoresistance, and overall device integrability need substantial
enhancements. This demands the development of novel materials and stack structures with
improved characteristics like spin polarization, damping coefficient, magnetic anisotropy, and
charge-to-spin conversion efficiency. Device-level improvements are crucial as well, especially
for expanding the functionalities of spintronics into areas such as quantum and neuromorphic
computing, sensing, and random number generation. Furthermore, the peripheral circuitry,
which remains underdeveloped compared to conventional CMOS circuits, requires significant
refinement to support better system integration, functionality, energy efficiency, response speed,
and reliability.
This Research Topic aims to convene recent breakthroughs and ongoing research in spintronics
with a focus on addressing the practical challenges that inhibit the broader adoption of
spintronic devices. We encourage contributions that explore, but are not limited to, the
following areas:
Material advances and device innovations to reduce the writing power consumption of
spintronic devices.
Strategies to enhance readout efficiencies, such as improvements in tunnel
magnetoresistance effects.
Methods to enhance the operating speed and response characteristics of spintronic devices
Novel designs and functional implementations at the device level
Innovative circuit design and integration methods for spintronic devices
New applications of spintronic chips at the circuit and system levels
We accept original research articles, review articles, and perspective papers, aiming to promote
the comprehensive development of spintronics from materials, physics, devices to circuit levels.
impediment within the domain of computing architecture. Primarily driven by leakage currents
in increasingly miniaturized CMOS-based chips, SPC now accounts for more than half of these
devices' total power usage. In light of these challenges, non-volatile spintronic devices, which
utilize electron spin rather than charge for data processing and storage, are regarded as a
breakthrough solution potentially capable of reducing or eliminating SPC, marking a promising
divergence from conventional CMOS technologies. Significant strides have been made in this
novel field, highlighted by the commercialization of technologies such as magnetic randomaccess memory, which finds application in diverse settings from smart devices to aerospace.
However, despite their intrinsic benefits, spintronic devices still encounter several obstacles
that hamper their performance. On the material front, issues such as operation speed, switching
current density, tunneling magnetoresistance, and overall device integrability need substantial
enhancements. This demands the development of novel materials and stack structures with
improved characteristics like spin polarization, damping coefficient, magnetic anisotropy, and
charge-to-spin conversion efficiency. Device-level improvements are crucial as well, especially
for expanding the functionalities of spintronics into areas such as quantum and neuromorphic
computing, sensing, and random number generation. Furthermore, the peripheral circuitry,
which remains underdeveloped compared to conventional CMOS circuits, requires significant
refinement to support better system integration, functionality, energy efficiency, response speed,
and reliability.
This Research Topic aims to convene recent breakthroughs and ongoing research in spintronics
with a focus on addressing the practical challenges that inhibit the broader adoption of
spintronic devices. We encourage contributions that explore, but are not limited to, the
following areas:
Material advances and device innovations to reduce the writing power consumption of
spintronic devices.
Strategies to enhance readout efficiencies, such as improvements in tunnel
magnetoresistance effects.
Methods to enhance the operating speed and response characteristics of spintronic devices
Novel designs and functional implementations at the device level
Innovative circuit design and integration methods for spintronic devices
New applications of spintronic chips at the circuit and system levels
We accept original research articles, review articles, and perspective papers, aiming to promote
the comprehensive development of spintronics from materials, physics, devices to circuit levels.
Keywords: Spintronic physics, Magnetic materials, Spintronic devices, Spin computing, Spin memory, Spintronic circuits
Important Note: All contributions to this Research Topic must be within the scope of the section and journal to which they are submitted, as defined in their mission statements. Frontiers reserves the right to guide an out-of-scope manuscript to a more suitable section or journal at any stage of peer review.
