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ORIGINAL RESEARCH article

Front.Electron.
Sec. Integrated Circuits and VLSI
Volume 5 - 2024 | doi: 10.3389/felec.2024.1377080
This article is part of the Research Topic Emerging Materials, Novel Circuit and System for Neuromorphic and AI Acceleration in the Big Data Era View all articles

Compact Grounded Memristor Model with Resistorless and Tunability Features

Provisionally accepted
Majid Ahmadi Majid Ahmadi 1*Ankit Mehta Ankit Mehta 1Arash Ahmadi Arash Ahmadi 2
  • 1 Department of Electrical and Computer Engineering, Faculty of Engineering, University of Windsor, Windsor, Canada
  • 2 Department of Electronics, Faculty of Engineering and Design, Carleton University, Ottawa, Ontario, Canada

The final, formatted version of the article will be published soon.

    This research article provides a circuit illustration of a grounded memristor emulator. An operational transconductance amplifier (OTA) is one of its active components, along with two transistors and one capacitor. With a simple flip of the input ports, the incremental and decremental settings for the proposed memristor may be preserved. With the capacity to function in the megahertz band, the circuit offers a resistorless and controllable feature. Using the Cadence Virtuoso EDA tool in an analog design environment (ADE), PSPICE simulation with 0.18 µm TSMC technology parameter has been used to illustrate the viability of the suggested memristor. It has been confirmed in the simulation section that the operating frequency and tunability responses in the current-voltage (I-V) plane are in reasonable agreement with the theory. The suggested memristor model's resilience has also been tested using process corner, Monte Carlo analysis, and temperature analyses, as well as single and parallel connected structures. The suggested memristor model is simple and does not need additional sub-circuit components, making it appropriate for implementation in integrated circuits. The experimental demonstration has been carried out by making a prototype on a breadboard using ICs, which exhibits good agreement with theoretical and simulation results. Single/parallel combinations of memristor, chaotic oscillator, and high pass filter have been presented to demonstrate its application.

    Keywords: Current mode circuit, Memristor, pinched hysteresis loop (PHL), Chaotic oscillator, CMOS technology

    Received: 26 Jan 2024; Accepted: 28 Oct 2024.

    Copyright: © 2024 Ahmadi, Mehta and Ahmadi. This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) or licensor are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms.

    * Correspondence: Majid Ahmadi, Department of Electrical and Computer Engineering, Faculty of Engineering, University of Windsor, Windsor, Canada

    Disclaimer: All claims expressed in this article are solely those of the authors and do not necessarily represent those of their affiliated organizations, or those of the publisher, the editors and the reviewers. Any product that may be evaluated in this article or claim that may be made by its manufacturer is not guaranteed or endorsed by the publisher.