DePFET—Recent Developments and Future Prospects

The DePFET is a sensor amplifier structure first proposed in 1987. In recent years, DeFPET based sensors have been deployed for particle tracking at Belle II experiment and been launched into space aboard the planetary science mission BepiColombo in its MIXS instrument. In the future DePFETs are proposed for the Wide Field Imager aboard the ATHENA satellite and developed for use as real-time imager for transmission electron microscopes These sensors have all been tailored to the needs of the respective application, providing high frame rates and accurate position resolution for tracking, Fano-limited energy resolution and position resolution matched to telescopes for X-ray spectroscopy or high frame rates and maximized dynamic range for applications on TEMs. In addition to this, several DePFET based concepts, implementing additional functionality on pixel level have been tested in recent years. Among these are the tailoring of the internal gates shape to implement a non-linear signal response and provide a larger dynamic range or a drastic increase of the DePFETs amplification. Furthermore, super pixels providing capabilities to reach sub electron noise and single electron resolution through repetitive readout, a fast electronic shutter at pixel level and the realization of multiple storage regions within one pixel have been tested. It was further demonstrated, that combinations of these features can also be realized. Over all, it is noted that advances in DePFET technology will provide sensors that are optimally tailored to the need of a specific application.

1 Introduction

The DePFET is an active pixel sensor combining sensor and first amplification stage [1]. It consists of a MOSFET built on a high resistivity n-doped silicon wafer. The layout and equivalent circuit of a DePFET are shown in Figure 1A,B respectively. The MOSFET consists of source, drain and external gate. A deep-n implant below the external gate forms a potential minimum for electrons. As the device is fully depleted by a thin p + backside contact, charge generated within the bulk, will be collected in this, so called internal gate. Charge collected in the internal gate increases the channel conductivity. By measuring this change the number of collected charge carriers can be deduced. The change of current caused by charge in the internal gate is denoted as g_q and called internal amplification or charge gain. A removal of charge from the internal gate is possible through the adjacent clear and clear gate. For the readout itself, either the current change caused by the charge in the internal gate is measured directly, or a constant current is imprinted on each channel of the DePFET and the change of the source-potential in this source follower-configuration is measured.

FIGURE 1

FIGURE 1. (A) shows a schematic illustration of a DePFET while (B) shows the equivalent circuit of the DePFET. A DePFET is based on a MOSFET built on a high resistive fully depleted bulk. A deep-n implant below the gate of the MOSFET forms a positive potential. Electrons, generated in the bulk by radiation or thermal excitation will be collected in this “internal gate”. Removal of the electrons is possible through the adjacent clear and clear gate. Pictures are after [1].

The main benefit of the DePFET is its high signal gain already on-chip. It can be used as read node of a Silicon Drift Detector (SDD), or as base cell of a matrix assembly. Control and readout of such a matrix are done utilizing dedicated ASICs, typically providing a row-wise, column parallel readout [2, 3]. Concepts for a full parallel readout of a complete matrix have also been tested in the past [4]. The readout ASICs provide different readout schemes as a single sampling or a trapezoidal weighting of the signal level.

2 Application Examples of “Standard” DePFETs

DePFETs have been successfully deployed in the Belle II experiment at KEK-B as well as for the planetary science mission BepiColombo as part of the MIXS instruments and will be utilized in the future, for example for the Wide Field Imager (WFI) of the X-ray telescope Athena.

2.1 Belle II

The SuperKEKB facility is an electron-positron collider located in Japan. The facility recently got upgraded to increase its luminosity. Its Belle II experiment utilizes DePFET based matrices for the two innermost layers of its particle tracker (Figure 2A). These two layers of pixelated detectors (PXD) are at a radius of 14 and 22 mm respectively. One module of the tracker consists of an array of 256 × 768 pixels of 55 × 50 μm² for the inner and 85 × 55 μm² for the outer layer. Within the sensitive area, the sensor is thinned to 75 μm thickness (Figure 2B). The surrounding balcony is not thinned, provides mechanical stability, and mounts Switcher, Drain Current Digitizer (DCD) and Data Handling Processor (DHP), the control and readout ASICs of the matrix, as well as passive components. To maximize the readout speed, the ASIC measures the signal and baseline-level before the clear, the baseline-level is subtracted by the DHP [5]. This allows single line readout within 100 ns, reading four lines of 256 pixels in parallel, this results in a frame rate of 50 kHz [3]. After promising commissioning phases in 2016 and 2018 [6], first scientific data were acquired in 2019. The sensors show a high hit efficiency of >98% and provide high signal to noise ratios between 40–50 [5]. In 2020, irradiation tests on Belle sensors, including all parts of the front-end electronic were carried out. The module was irradiated up to a dose of 266 kGy [7]. As shown, the performance of the sensor is stable provided the DePFET operation voltages are adjusted to account for the radiation damage.

FIGURE 2

FIGURE 2. (A) shows a picture of a half shell of the vertex detector of Belle II. The innermost layers are the two DePFET based PXD sensors. One Module of the PXD sensor modules is shown in (B). Within the sensitive area, the sensor is thinned to 75 μm, readout and control ASICs as well as passive components are mounted on the balcony of the all silicon module (Pictures curtesy of the Belle II collaboration).

2.2 MIXS

The first space born instrument utilizing DePFETs is the Mercury Imaging X-ray Spectrometer (MIXS) aboard the BepiColombo Spacecraft. The MIXS instruments consist of two channels, a collimator (MIXS-C), providing a large field of view and a high resolution telescope (MIXS-T), each equipped with a DePFET matrix in their focal plane (Figure 3A). The goal of MIXS is to provide information about the elemental composition of Mercuries surface [8]. Figure 3B shows one DePFET sensor, glued to its mechanical support and mounted on a ceramic PCB including readout and control ASICs. The DePFET matrices for the two MIXS instruments consist of 64 × 64 pixels of 300 × 300 um². The sensor is cooled to -40 °C. The ASTEROID 1.5 readout ASIC provides source follower readout per column and implements a trapezoidal weighting of the signal by measuring the source voltage before and after the clear process and subtracting the two measurements from each other. Signal shaping is done for 64 channels in parallel. Using a readout rate of 5.2 µs per row a noise of 4.5 e- ENC were achieved in laboratory conditions. With flight electronics a noise of 7.9 e-was estimated. The sensor provides near Fano-limited noise over the required energy range from 0.5 keV up to 7 keV [2]. The planned arrival of BepiColombo at Mercury is in 2025.

FIGURE 3

FIGURE 3. (A) shows MIXS-T and MIXS-C, the first DePFET based space born instruments [8]. They are onboard the BepiColombo spacecraft that is on its way to Mercury (B) Shows the DePFET sensor glued to its mechanical support and bonded to four SwitcherS and two Asteroid ASICs [2].

2.3 ATHENA

The next space born mission using DePFET based sensors will be the Advanced Telescope for High ENergy Astrophysics (ATHENA) (Figure 4A). One of the two instruments in its focal plane is the Wide Field Imager (WFI). It will be comprised of four 512 × 512 monolithic DePFET matrices (Figure 4B) with 130 × 130 μm² pixel size [9, 10]. Addressing and readout are done by the next generation of Switcher (SwitcherA) and readout ASIC (Veritas-2) [11]. The Veritas-2 provides the option for both drain current readout as well as source follower operation [12, 13]. Analogue signal processing is done within the ASIC, again providing a trapezoidal weighting of the signal charge for 64 channels in parallel. One matrix of the WFI will be equipped with eight Veritas-ASICs, reading 512 channels in parallel. The matrix is read row by row in a rolling shutter manner. The main goal of the developments for the WFI was to improve the noise and energy resolution of the DePFET sensors for X-ray spectroscopy at high frame rates [11]. WFI devices similar to those on MIXS, with a circular geometry as well as DePFETs with a linear geometry were tested. Due to the smaller gate length and width, the linear geometry provides higher gain as well as lower noise. The linear DePFETs consistently provide a noise below 2.5 e- ENC at readout rates below 5 μs/row [14]. Additionally, changes in the technology were implemented to increase the robustness of the devices [15]. It was further found, that for the large sensors and the resulting capacity of the readout line, a readout of the drain current is the favorable method [16]. The largest spectroscopic devices operated and reported to this date are 256 × 256 pixel matrices. With these matrices, readout rates as fast as 3.5 μs/row (about 1 kHz frame rate) have been tested yielding noise values of 3.15 e- and an energy resolution of 136 eV for the Mn Kα line at 5.9 keV. At slower readout rates of 9.8 μs/row, the noise improves to 1.8 e- and the energy resolution to 127.7 eV [17].

FIGURE 4

FIGURE 4. (A) shows an artist’s impression of the advanced telescope for high energy astrophysics (Athena) (copyright: European Space Agency (ESA)). Athena will have two instruments in its focal plane, one of the two instruments is the WFI. As shown in (B) the WFI will consist of a large sensor array comprised of 4 512 × 512 DePFET sensor matrices and one small sensor optimized for high count rates [10].

3 Non Standard DePFETs

In addition to its intrinsic charge gain, DePFETs provide a basis for more complex devices. This can be done either by modifying the shape of the DePFETs internal gate or by adding additional structures to form a super pixel providing capabilities beyond that of a standard DePFET.

3.1 Shaping of the internal gate

The two examples discussed below modify the shape of the internal gate to implement a tailored signal response to realize a DePFET with intrinsic signal compression or the drastic increase of the DePFET gain by localizing the internal gate implant.

3.1.1 DePFET With Signal Compression

Most sensors show a linear response to the signal charge they collect. While linearity is usually a requirement for many applications, it also introduces problems when the generated charge spans over several decades of stored electrons, as it for example is the case in diffraction experiments. In these cases, it can be helpful to implement a dynamic signal compression, providing high gain for low signals and low gain for larger signals [18]. In addition, the large resulting charge handling capability, i.e. the number of electrons that can be stored in one pixel, can be used for applications dealing with large amounts of charge as for example the case in real time, real space imaging with Transmission Electron Microscopes (TEM) [19]. A dynamic signal compression is implemented into a DePFET by adjusting the implants of the DePFET as indicated in Figure 5. Here the source implant is divided into a deeper and a shallower p + region. The potential below the source therefore allows charge to “overflow” from the internal gate into this overflow-region. Small numbers of signal electrons will be collected in the internal gate and amplified with the normal gain of a DePFET. For large signals the generated electrons are stored only partly under the FET channel, but more and more under the source region. Electrons in this ‘overflow’ region of the internal gate have a reduced effect on the transistor current, causing a reduction of amplification for large signals. In photon counting applications, these devices allow to simultaneously measure single photons as well as several thousands of photons. In addition to the capability of providing a signal compression, the overflow region effectively increases the DePFETs storage capacity for electrons. A single pixel of this type can store up to two million signal electrons. Currently the development of the EDET camera system for application in TEMs is ongoing. It is based on a one MPix matrix of DePFETs with nonlinear response and will provide frame rates of 80 kHz. Characterizations of the DePFET devices show that the large dynamic range and storage capability are met as expected [19].

FIGURE 5

FIGURE 5. shows a DePFET with adapted implants, that provide an overflow region below the source (picture after [18]). This results in a non-linear signal response with electrons collected only in the internal gate having a high amplification. Once this area is filled up, charge is shared between the internal gate and overflow, resulting in a reduction of the amplification. In addition to the signal compression this increases the maximum amount of charge that can be stored inside the DePFET.

3.1.2 Super g_q

As mentioned beforehand, the key features of the DePFET is the in pixel signal amplification. To improve the gain of the DePFET it is thus usually suggested to reduce the size of the internal gate and thus its equivalent capacity. This in turn increasing the current change per electron g_q. For standard DePFET devices, the extension of the internal gate is determined by the size of the external gate. This means that a reduction of the internal gate lengths requires a reduction of the external gate, with all benefits and drawbacks. The resulting increase of the electric fields within the device typically leads to impact ionization at the drain end of the conductive channel, generating electron-hole pairs observed as additional leakage current that deteriorate the sensors performance. Recent simulations showed that it is possible to decouple the size of internal and external gate using an additional implant. As indicated in Figure 6, the additional implant is located on the source side of the DePFET only under a small area below the external gate. The internal gate will be constrained to the area of the transistor with this additional implant. This circumvents limitations that would result from reducing the length of the external gate, while simultaneously increasing the DePFETs gain. Additionally, the change of the field distribution inside the DePFET arising from this implant reduces the electric field and mitigates impact ionization, as studied using TCAD simulations, when compared to current DePFETs. These new super g_q DePFETs should increase the g_q of the DePFET by a factor of three and are potentially capable to reach sub-electron noise [20].

FIGURE 6

FIGURE 6. shows a super g_q DeFPET. An additional deep-n implant on the source side of the DePFET reduces the size of the internal gate to the part of the transistor with this additional implant. This decouples the size of the internal gate from the external gate and increases the DePFETs gain [20].

3.2 DePFET super pixels.

A DePFET super pixel is formed in most cases by combining several DePFET into a larger pixel, providing additional functionality. Four examples are the RNDR-DePFET, the gateable DePFET, the Infinipix and the Quadropix.

3.2.2 RNDR DePFET

Within a DePFET the charge is stored inside its internal gate and preserved for readout. For a correlated double sampling or trapezoidal weighting of the signal charge, it is necessary to remove the charge collected in the internal gate from the DePFET. This is usually done via the clear contact. If instead, the charge is moved to a storage node, and later on transferred back into the internal gate, it is possible to read out the same charge multiple time, providing a reduction of the sensors noise to values allowing for single electron detection. For a DePFET this Repetitive Non-Destructive Readout (RNDR) is implemented using two DePFETs in close vicinity to each other as shown in Figure 7A. An additional MOS contact, the transfer gate, provides a means to move the charge between them. One DePFET will always be active and read out, while the other is off and serves as storage node. During the measurement the charge is moved from the DePFET in the ON state to the other by applying a positive voltage to the transfer gate. Following the central limit theorem, the noise reduces with one over the square root of the number of readouts. If the time for a single readout is kept constant, the noise can be theoretically be reduced arbitrarily provided the longer overall readout time is acceptable. On single pixel level, noise values as low as 0.25 e-were measured allowing to detect single electrons as shown in Figure 7B [21, 22]. The resulting single electron resolution was demonstrated even to electron numbers of hundreds and thousands of electrons. Due to their extreme low noise capability, RNDR-DePFETs are capable to measure even smallest signals. Recently these devices were proposed for the search of Dark matter in the MeV region. A first matrix of 64 × 64 pixels is currently under test for this purpose [23].

FIGURE 7

FIGURE 7. (A) shows a sketch of a DePFET with Repetitive Non-Destructive Readout functionality (B) Shows a histogram of an RNDR DePFET. On the x-axis is the amplitude in arbitrary digital unis and the counts per channel on the y axis. The baseline level is shown in blue, the signal of a weak laser source in orange. Due to the low noise of the device achieved at 400 readouts, the peaks corresponding to single electrons are visible [22].

3.2.2 Gateable DePFET

In principle, a DePFET is always sensitive to charge generated in the bulk. There are however applications that require the capability to momentarily switch of the sensitivity of the sensor, for example to prevent out-of-time events or to synchronize with a light source and prevent signal contamination. With a DePFET this it is possible to implement a fast electronic shutter into the pixel, forming a so-called gateable DePFET. An example of such a device is shown in Figure 8. Here a circular DePFET is surrounded by a large MOS contact (blind gate) with embedded n + contacts (blind). In collection mode, charge is collected as usual in the internal gate of the DePFET. To prevent charge collection, a positive potential is applied to the additional electrode, redirecting charge generated within the bulk into this blind-contact. The suppression coefficient has a position dependence but was demonstrated to be better than 4e-4. The measurements show a switching time of less than 100 ns [24]. It is dominated by the extension of the charge cloud during its drift through the bulk and the time required to fully collect the electrons in the internal gate. Charge present in the internal gate is kept there even when the shutter is active. Furthermore, it is possible to read out the charge in the internal gate while the sensor is in the insensitive state. Using a gateable DePFET makropixel device it was demonstrated, that especially at high readout rates (as required for bright sources) a significant improvement of the spectroscopic performance of the DePFET can be achieved. The benefit for X-ray spectroscopy has been demonstrated by directly comparing the X-ray spectra from a gateable DePFET. Two spectra, taken with the same gateable DePFET makropixel at an illumination time of 15 μs and readout time of 4.25 μs are shown in Figure 8B [25, 26]. The orange histogram show the spectrum obtained without use of the shutter while the blue spectrum demonstrates the suppression of misfits during the readout and improving the peak to background ratio by a factor of 10 for the shown measurement.

FIGURE 8

FIGURE 8. (A) shows the so called gateable DePFET consists of a DePFET (here with circular geometry) surrounded by a large MOS structure (blind gate) and n + contacts (blind) that allow to prevent charge collection inside the DePFET itself [26]. This electronic shutter can be used to suppress charge collection and prevent for example out of time events. The suppression of charge collection can be used to prevent charge collection during the readout. This improves especially the peak to background of DeFPET sensors as shown in (B) [26].

3.2.3 Infinipix

The disadvantage of a gateable DePFET is that it is insensitive to incident charge while the electronic shutter is active. As long as the illumination time of the sensor is long compared to its readout time, or the signal arrival is synchronized to the illumination time of the sensor, this is not an issue. If, however the illumination time is of the same order as the readout time, this will lead to a significant reduction of efficiency for gateable DePFETs. To overcome this limitation, a storage node, would be required, that collects charge arriving during the insensitive phase of the DePFETs and preserves for later readout. One implementation of this idea is the so-called Infinipix. Here, two DePFETs are placed in close vicinity to each other as shown in Figure 9. Contrary to an RNDR DePFET, the two internal gates are not connected but isolated from each other. Through the potentials applied to the DePFETs drains, one DePFET is sensitive to incoming charge and collects it in its internal gate while the other doesn’t collect charge and can be read out. As the insensitive DePFET can be read out it processes the signal collected in its previous sensitive state. The switching of sensitivity happens within less than 200 ns[26]. With exception of the clear process, these devices continuously collect charge. Measurements on prototype matrices of 32 × 32 pixels, with a pixel size of 130 μm² demonstrated that these devices can provide excellent noise and spectroscopic performance. For readout rates of 5μs per row noise values of 2.3 e- and an energy resolution of 123 eV for the Mn Kα line was reported. Further, an improvement of the peak to background, caused by the minimization of out of time events, by a factor of 4, when compared to a standard DePFET operated at the same frame rate, was achieved [27]. One of the crucial parameters for an Infinipix is the applied backside voltage. While a minimum voltage is required to fully deplete the sensor, a too large backside voltage will result in a reduction of the suppression of charge collection. For the first tested layouts, the operation window is limited to a few volts in which the device functions optimally [28]. An extensive simulation study to improve the layout was conducted to increase the voltage range for the backside to more than 20 V. The only disadvantage of the Infinipix is that the readout is currently only possible in source-follower mode. For a drain readout an ASIC with the capability to also switch the drain potential is required. However, for small array sizes, this is not required. An Infinipix array read fully-parallel could provide readout rates in the hundred kHz range and be used for X-ray spectroscopy.

FIGURE 9

FIGURE 9. shows an Infinipix. It is formed by placing two linear DePFETs close to each other. The devices share the source contact and always one DePFET is collecting charge while the other is insensitive and ready for readout. The selection, which DePFET collects charge is done via the potentials applied to the devices drains [26].

3.2.4 Quadropix

The natural escalation of the Infinipix concept is to include more DePFETs into a super pixel and provide more collection nodes. This Idea lead to the Quadropix. As shown in Figure 10A a Quadropix consists of four DePFETs arranged into super pixel. As indicated in (B) charge collection can be set always to one of the four sub-pixels through the voltages applied to the four DePFET drains. In a matrix arrangement, the sub-pixels form sub-matrices that can be addressed individually. For a matrix of 64 × 64 super pixels, four sub-matrices with 64 × 64 pixels each (overall 256 × 256 pixels) have to be read out. This allows to associate the sub-frame collected within each sub-matrix with defined time intervals. This is ideal for the recording of periodic or modulated signals. One example for this is imaging polarimetry. Here the polarization of incident light can be translated into an intensity modulation that is recorded by the sensor. The polarization, in form of the stokes parameters is calculated from the differences of the measured intensity modulations [29]. The state of the four DePFETs (i.e. which is sensitive to charge) is again set by the potentials applied to the drain contacts. The drains of the insensitive DePFETs are set to a negative voltage while the drain of the sensitive DePFET is at 0 V. In a matrix, the drains of the super pixels are connected, leading to an intrinsic asymmetry between the four collection states. The intrinsic asymmetry of the potential distribution within the bulk results in an asymmetry between the four collection states that can be a serious limitation for very sensitive experiments as the before mentioned high precision polarimetry. In addition, similar to the Infinipix, the backside voltage is one of the crucial parameters for the Quadropix, with a too large overvoltage leading to a worsening of the selectivity. To overcome these limitations, optimizations of the Quadropix were studied. Utilizing an additional high energy implant, aligned to the pixel structure, it should be possible to minimize the asymmetry of the different collection states and furthermore, increase the operation window for the backside voltage [29].

FIGURE 10

FIGURE 10. (A) shows a sketch of a Quadropix DePFET. One super pixel consists of four DePFETs, A, B, C, D [29]. In (B) the electrostatic potential distribution inside one super pixel and the trajectories of charge carriers are shown to illustrate the working principle. charge generated inside the Bulk is collected in one of the four DePFETs [29].

3.2.5 Gateable RNDR DePFET

An interesting idea is the combination of multiple features within one pixel to further tailor the DePFET to the given requirements. One example that has been tested in the past is the combination of the gateable and the RNDR feature. The layout of such a device is illustrated in Figure 11. Here a compact RNDR device in circular geometry is embedded inside a blind gate with blind contacts. The transfer of charge between internal gate one and two (abbreviated to IG1 and IG2) is done over the transfer gate on the upper left of the DePFET. A clear and clear gate are available to remove collected charge from the internal gates. The device either collects charge as a standard DePFET or can be switched into an insensitive mode by applying a positive voltage to its blind and blind gate contacts. Readout is possible both when the device is sensitive as well as when it is insensitive. When the readout takes place, while the device is insensitive, the charge generated in the bulk is drained into the blind contacts. Thereby it is possible to reduce bulk leakage current and neglect charge generated by incident radiation during the readout. The tested device was operated with and without the use of the built in shutter. In both cases, single electron resolution was reached. To test the benefit of the shutter, the sensor was illuminated by a feint light source during the readout. For the operation without use of the shutter, the collection of charge during the readout phase prevents single electron resolution. With the shutter, single-electron resolution was maintained [22].

FIGURE 11

FIGURE 11. shows a circular RNDR DePFET. It consisting of gate 1, gate two transfer gate as well as clear and clear gate, can be embedded in a blind gate with blind contacts to form a gateable RNDR DePFET [29].

4 Summary

The sensors discussed in this work have been produced at the Semiconductor Laboratory of the Max-Planck-Society (HLL) and the measurements on these devices were carried out either by the laboratory or by partners working with it. It should be mentioned that in recent years, other groups started to work on the DePFET either in an adapted CMOS technology [30], as base element of pixelated sensors or as read node of a CCD based sensor [31]. Thanks to the constant development of DePFETs over the course of years, standard DePFETs have been deployed to large scale experiments as Belle II and MIXS. The improvement of the DePFET is an ongoing process as the prototype development for the ATHENA mission demonstrates. The ATHENA sensors are the first wafer scale DePFET devices produced on six” wafers. In addition to the use in particle tracking and planetary science missions and the development for X-ray imaging spectroscopy, advances for applications at Transmission Electron Microscopes are ongoing and DePFETs have been considered for applications at Free Electron Lasers. Furthermore, a number of new DePFET structures and optimizations have been studied in recent years. As discussed, by shaping the internal gate through the DePFET implants, it is possible to tailor and optimize the signal response: either implementing a nonlinear response and maximizing the charge that can be stored within one pixel, or increasing the signal gain to values beyond 1nA/e. In addition, it is possible to build super pixel structures that provide features as a fast electronic shutter, two or more storage nodes within one pixel or implement the RNDR principle reducing the read noise to levels that allow single-electron resolution. Moreover, a combination of the RNDR principle with an electronic shutter was demonstrated.

5 Outlook

What developments are to be expected in the future? There are on the one hand the obvious developments in the field of silicon processing, moving towards smaller features and increased wafer size, with feature sizes of 10 nm available in mainstream process technologies and wafer sizes of 8″ to 12″, being the standard today. Translating this to DePFETs, especially the production of larger wafers will lead to sensors with larger sensitive area. A reduction in feature size for the DePFET can be translated in smaller pixel size, provided this is required for a given experiment. While the experience with Belle II shows that the sensors are radiation tolerant and can be used also in harsh environments, further improvements of the radiation hardness are ongoing. These are mainly aimed at reduction of the thickness of the gate insulator and optimize the composite dielectrics. Another topic to be considered is the integration of parts of the control and readout electronics onto the DePFET sensor. Currently, control and readout of the DePFET sensors is done by specialized ASICs that are either wire or bump bonded to the sensor matrix. This is useful for example in space applications, as the ASICs can be thermally decoupled from the sensor. However, for sensor matrices with 512 × 512 pixels eight control and eight readout ASICS and several thousand bond-contacts are required. This leads to a non-negligible thermal connection between sensor and readout electronics and the risk of mechanical failure of one bond wire. As the DePFET is based on planar silicon technology, it should be possible to implement part of the control and readout electronics on the sensor die itself, reducing the number of ASICs required to operate a DePFET based sensor. The compatibility of the DePFET with a CMOS circuitry has to be evaluated, especially, which adaptions and additional processing steps are required. Considering the low noise of the DePFET and its typical gate length of several µm, the most meaningful parts to be included are the analogue components as preamplifier and analogue filter as well as switchers, while the digital control of the sensor matrix is done by a dedicated control ASIC. The inclusion of these components on the die have to be considered carefully to assure, that the additional thermal load on the sensor is not exceeding the power requirements of the experiment. As a last point, let’s consider what the limits for a DePFET based silicon sensor are. As pointed out beforehand, DePFETs are in use or under development for several applications with widely different requirements. Let’s limit the consideration to a sensor for high throughput imaging X-ray spectrometry. The parameters that need to be optimized for this purpose are quantum efficiency (QE), energy resolution, readout speed and position resolution of the sensor. The Quantum efficiency for X-rays is given by the entrance window for low energies and by the bulk-thickness at high energies. On the lower end of the energy range the thin entrance window technology developed at the HLL provides high quantum efficiency [32]. With a standard bulk-thickness of 450 μm, photons up to 10 keV are collected with more than 90% QE. At a pixel size of 30 μm², the incident X-ray charge is always distributed over a cluster of at least four pixels, allowing to interpolate the position of the incident photon with an accuracy of about 2 μm [33]. The energy resolution is limited by the Fano noise, which is intrinsic for silicon. To maintain the Fano limit, low noise per pixel is required. Considering that the charge is distributed over at least four pixels, the noise per pixel should be better than two electrons. Depending on the DePFET gain and noise properties, this limits the readout rate to the μs range. Assuming, a readout ASIC, that can be bump-bonded to a DePFET matrix this would lead to a full-frame readout rate of several hundred kHz. To prevent disturbance from out of time events, this would require the matrix to be comprised of Infinipix DePFETs ideally of super g_q type. The high gain of the super g_q will provide even lower noise or higher readout rates. The Infinipix allows to omit a seperate illumination time as always on sub-matrix collects charge while the other is read out. The use of super g_q principle allows to reach Fano-limited energy resolution and up to MHz readout rates, while the small pixel size provides μm position resolution.

Author Contributions

AB wrote the first draft of the manuscript, RR and FS contributed sections of the manuscript. All authoers contributed to manuscript revision and approved the submitted version.

Conflict of Interest

The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

Publisher’s Note

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