Book Review: Spintronics-Based Computing

A book review on
Spintronics-based Computing

Edited by Weisheng Zhao and Guillaume Prenat, Springer International Publishing, 2015. ISBN: 978-3-319-15179-3

If you're a casual reader looking for a spellbinding page-turner, or a curious amateur technophile, this is not the book for you. It is filled with grammatical errors and clumsy diction, the tone is as dry as the Gobi Desert, and there is no graceful introduction beyond the excellent summary in the short Foreword by Albert Fert. After that the various authors plunge directly into advanced technical detail, leaving the non-expert to cope with a baffling assemblage of acronyms. The Editors have not attempted to ease this tension via any overlays of their own, being apparently content to simply assemble the authors' completed manuscripts.

If, on the other hand, you are a condensed matter physicist specializing in an area relevant to spintronics and would like to know what has been (or may be) done using the phenomena you study, or if you are an electrical engineer specializing in computing using spintronics devices, and would like a current reference handbook, or if you are a device manufacturer or a software engineer trying to anticipate the next few increments (or bypasses) of Moore's Law, you may well find this a valuable resource.

From my own viewpoint (that of a retired physicist reading for fun) this book is actually rather interesting. First because it outlines the roadblocks to Moore's Law in meticulous detail and offers insight into where high performance computing is likely to go next; it seems quite probable that the terms of reference of Moore's Law will be revised qualitatively before the industry bumps up against the hard limits imposed by quantum mechanics and ohmic losses. Second, because it vividly displays the speciation of human endeavor in the pursuit of extremely profitable technologies: each new incremental improvement of performance (not to mention each new breakthrough) entails ever more specialized refinements of materials and techniques, leading to an encyclopedic terminology which can only fit into a finite space by reducing each to its own acronym. Here they are all assembled. One worries that verbs will be acronymized as well, so that entire sentences contain nothing but acronyms (as is common in “texting” already). But in this volume there are still many sentences recognizable as English, and some of them are quite enjoyable to read.

Glossary of Acronyms: (⋆ = “trending” in Spintronics)

· BEOL: Back-End Of Line

· BER: Bit Error Rate

⋆ CAM: Content Adressable Memory

· CIDW: Current Induced Domain Wall [motion]

· CML: Current Mode Logic

· CMOS: Complementary Metal Oxide Semiconductor

· CNN: Cellular Neural Network

· CPU: Central Processing Unit

· DMS: Dilute Magnetic Semiconductor

· DRAM: Dynamic Random Access Memory

· DTL: Diode-Transistor Logic

· DW: Domain Wall

· ECC: Error Correction Circuit

· EDAX: Energy Dispersive X-ray Analysis [sic]

· EELS: Electron Energy Loss Spectroscopy

⋆ FeRAM: Ferroelectric Random Access Memory

· FET: Field Effect Transistor

· FF: Flip-Flop

⋆ FIMS: Field-Induced Magnetic Switching

· FM: FerroMagnetic

· FPGA: Field Programmable Gate Array

· GMR: Giant MagnetoResistance

· hplp: high performance, low power [processor]

· HRTEM: High Resolution Transmission Electron Microscopy

· ITRS: International Technology Roadmap for Semiconductors

· LLG: Landau-Lifshitz-Gilbert [equation]

· LSI: Large Scale Integration

· LUT: LookUp Table

· MBE: Molecular Beam Epitaxy

⋆ MCNN: Magnonic Cellular Neural Network

· MCU: MicroController Unit

· ME: MagnetoElectric

⋆ MeRAM: Magnetoelectric Random Access Memory

· MFA: Magnetic Full Adder

⋆ MFF: Magnetic Flip-Flop

· MOKE: Magneto-Optical Kerr Effect

· MOS: Metal Oxide Semiconductor

· MOSFET: Metal Oxide Semiconductor Field Effect Transistor

⋆ MRAM: Magnetic (or Magnetoresistive) Random Access Memory

⋆ MTJ: Magnetic Tunnel Junction

· NMOS: a Negative-channel MOSFET

· NVFF: Non-Volatile Flip-Flop

· NVL: Non-Volatile Logic

⋆ NV-LIM: Non-Volatile Logic-In-Memory [architecture]

⋆ PCRAM: Phase Change Random Access Memory

· PCSA: Pre-Charge Sense Amplifier

· PMA: Perpendicular Magnetic Anisotropy

· PMOS: a Positive-channel MOSFET

· PVT: Process Voltage Temperature

· RAM: Random Access Memory

⋆ ReRAM: Redox Random Access Memory

· RM: Racetrack Memory

· SET: Single Event Transient

· SEU: Single Event Upset

· SHE: Spin Hall Effect

· SOT: Spin Orbit Torque

· SPCSA: Separated Pre-Charge Sense Amplifier

· SRAM: Static Random Access Memory

⋆ STT: Spin Transfer Torque

⋆ SWB: Spin Wave Bus

· TAS: Thermally Assisted Switching

⋆ TCAM: Ternary Content-Addressable Memory

· TMR: Tunnel MagnetoResistance [this one is used immediately, without definition]

⋆ VCMA: Voltage-Controlled Magnetic Anisotropy

If you are not already familiar with at least half of these terms, you may have trouble keeping up.

Contents:

• “Current-Induced Magnetic Switching for High-Performance Computing”, by Yue Zhang, Weisheng Zhao, Wang Kang, Eyra Deng, Jacques-Olivier Klein, and Dafiné Revelosona

• “Electric Control of Magnetic Devices for Spintronic Computing”, by Jianshi Tang, Qiming Shao, Pramey Upadhyaya, Pedram Khalili Amiri, and Kang L. Wang

• “Advanced Perpendicular STT-MRAM Technologies for Power Reduction of High-performance Processors”, by Naoharu Shimomura, Shinobu Fujita, Keiko Abe, Hiroki Noguchi, and Hiroaki Yoda

• “Beyond STT-MRM, Spin Orbit Torque RAM SOT-MRM for High Speed and High Reliability Applications”, by Guillaume Prenat, Kotb Jabeur, Gregory Di PenDina, Olivier Boulle, and Gilles Gaudin

• “Challenge of Nonvolatile Logic LSI Using MTJ-Based Logic-in-Memory Architecture”, by Takahiro Hanyu

• “Logic Circuits Design Based on MRAM: From Single to Multi-States Cells Storage”, by Bojan Jovanović, Raphael Martins Brum, and Lionel Torres

• “Statistical Reliability/Energy Characterization in STT-RAM Cell Designs”, byt Wujie Wen, Yaojun Zhang, and Yiran Chen

• “Synchronized Spin Torque Nano-Oscillators: From Theory to Applications”, by Mehdi Kabir and Mircea Stan

Conflict of Interest Statement

The author declares that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.