John T. Fourkas1,2*
Jinwei Gao3
Zheng Han4
Haitao Liu5
Benedetta Marmiroli6
Michael J. Naughton7
John S. Petersen1,8
Yong Sun9
Alex Vagilio Pret10
Yuebing Zheng11- 1Department of Chemistry and Biochemistry, University of Maryland, College Park, MD, United States
- 2Institute for Physical Science and Technology, University of Maryland, College Park, MD, United States
- 3Institute for Advanced Materials, South China Academy of Advanced Optoelectronics, South China Normal University, Guangzhou, China
- 4State Key Laboratory of Quantum Optics and Quantum Optics Devices, Institute of Opto-Electronics, Collaborative Innovation Center of Extreme Optics, Shanxi University, Taiyuan, China
- 5Department of Chemistry, University of Pittsburgh, Pittsburgh, PA, United States
- 6Institute of Inorganic Chemistry, Graz University of Technology, Graz, Austria
- 7Department of Physics, Boston College, Chestnut Hill, MA, United States
- 8APPM-MCA AttoLab, imec, Leuven, Belgium
- 9Yale Cleanroom, Department of Applied Physics, Yale University, New Haven, CT, United States
- 10KLA Corporation, Concorezzo, Italy
- 11Walker Department of Mechanical Engineering, Materials Science and Engineering Program, Texas Materials Institute, The University of Texas at Austin, Austin, TX, United States
Introduction
Richard Feynman’s 1960 lecture “There’s Plenty of Room at the Bottom” has become somewhat of a trope in nanotechnology. And yet, it is impossible to ignore Feynman’s prescient work in what we might call “hypothetical applied physics” when considering current challenges in the continued development of nanofabrication. Feynman’s lecture starts out by suggesting that all 24 volumes of the Encyclopaedia Brittanica might be able to be written on the head of a pin. He points out that even at that time (1960), the technology required to read the text on the pinhead already existed. He further suggested that it would be easy to replicate some implementation of this pinhead-sized encyclopedia, using what we would now recognize as a form of soft lithography or nanoimprint lithography.
Even more than 60 years ago, Feynman saw the real challenge to the encyclopedia-on-a-pinhead being the writing step. He even sketched out concepts for techniques that we would today recognize as electron-beam lithography (EBL) (Chen, 2015) and focused ion-beam (FIB) (Baglin, 2012) lithography. 6 decades later, we have made tremendous progress in nanofabrication, which generally is considered to encompass both the writing and replication of nanostructures over large areas. Yet many challenges remain in the development of nanofabrication technologies, whether for laboratory-scale research or consumer-scale applications. Here we present our collective view on some of the Grand Challenges in nanofabrication, which we will define as the creation of arbitrary structures with a feature size of 100 nm or less.
Laboratory-Scale Grand Challenges
We first consider nanofabrication on the laboratory scale, which we will define operationally as involving the patterning of areas of 1 mm2 or more. Low-volume nanofabrication on this scale is crucial for a wide range of experimental platforms, as well as for prototyping and testing devices and technologies.
The current workhorse top-down technologies for laboratory-scale applications with resolution of 100 nm or better are exactly those imagined by Richard Feynman, i.e., EBL and FIB lithography. These methods are well developed, their use is relatively routine, and commercial tools are available that can pattern down to a feature size on the order of 5 nm. On the other hand, these methods are serial, and therefore have low throughput. EBL and FIB are not inexpensive, and have materials limitations. EBL and FIB can be used to create master structures for replication by techniques such as soft lithography (Xia and Whitesides, 1998a; Xia and Whitesides, 1998b) or nanoimprint lithography (Guo, 2007). Making replicas in this manner introduces its own set of materials limitations. There are also a handful of non-traditional techniques, such as multiplexed dip-pen nanolithography, that can compete with EBL and FIB for some materials in some applications.
Optical lithography, while a mainstay of industrial nanofabrication, has yet to play a large role in laboratory-scale nanofabrication with feature sizes of 100 nm or less. 193 nm immersion lithography (Sanders, 2010) can readily create features in this size range over large areas, but mask sets are too expensive for this technique to be used routinely in most laboratory settings. Nonconventional techniques, such as multiphoton absorption polymerization (MAP) (Baldacchini, 2019), hold some promise in this regard. Although MAP feature sizes of 100 nm or less have been reported by some academic laboratories (Liaros and Fourkas, 2019), the available commercial tools for MAP are not yet capable of attaining this feature size on a routine basis. Even if commercial tools were to reach this limit, MAP is still a serial technique, and so is slow.
One of the grand challenges that we envision for laboratory-scale nanofabrication, then, is the development of a table-top optical tool that can perform parallel patterning with high throughput and can deliver feature sizes on the order of tens of nanometers. Advances in materials for photolithography using multiple colors of light are beginning to point the way towards such a tool.
Another developing area of nanofabrication is a broad range of methods that deliver selected nanomaterials to desired locations, often in specified orientations (Li et al., 2019). Such techniques for nanofabrication in liquids hold considerable promise. Grand challenges in this arena include improving placement accuracy and moving to highly parallel fabrication.
A final grand challenge of top-down approaches is that there is an inevitable tradeoff between the patternable area and the feature size. For almost any nanopatterning technique, moving to a smaller feature size leads to a longer fabrication time. The development of methods that can circumvent this trade-off would constitute a major advance in the field.
Bottom-up approaches offer many potential advantages for laboratory-scale nanofabrication. For highly regular patterns (e.g., lattices or stripes), techniques based on the self-assembly of materials such as colloids and block copolymers are well established. For designer patterns, individual DNA nanostructures can be made with arbitrarily shaped patterns, with ca. 10 nm resolution and up to 1 μm in size (Wang et al., 2018). Self-assembly strategies offer the potential for patterning a wide range of materials with extremely high local spatial resolution.
At the same time, there are a number grand challenges associated with bottom-up strategies. The fabrication of desired structures in specific locations over a large area, which is a key requirement for multi-step fabrication, remains a largely unsolved problem. Most strategies require some sort of external inputs, such as guide structures in the case of the directed self-assembly of block copolymers, to template the self-assembly process. Many bottom-up approaches also suffer from a relatively high rate of defects that cannot easily be corrected. As such, improving the yield of self-assembled structures is also a grand challenge.
There are a number of grand challenges that exist for virtually all approaches to laboratory-scale nanofabrication. These challenges include developing techniques to take full advantage of the third spatial dimension (Seniutinas et al., 2017), integrating multiple materials into patterning, and integrating multiple patterning strategies, with all of the attendant challenges associated with registry and with stitching to pattern over large areas.
Industrial-Scale Challenges
Industrial-scale nanofabrication typically requires the ability to pattern over large areas with high throughput and yield. Few methods exist to achieve this goal currently. Some consumer goods with nanopatterned surfaces are created by nanoimprint lithography and/or roll-to-roll processing (Kooy et al., 2014). The workhorse technology of the field, however, is photolithography. Although the days of Moore’s law are behind us (Track et al., 2017), the semiconductor industry continues to push the limits of photolithographic technology to achieve ever finer resolution. It is remarkable that a single tool can create nanopatterns over a wafer that is 300 mm in diameter at a throughput of over 100 wafers/hour.
With the increase in functionality of logic and capacity of memory devices, we are in a steady march towards the quantum age of devices, in which the semiconductor industry has continually been able to shrink the feature size of the circuits that are made in high-volume-manufacturing facilities. The information content that needs to be transferred to fuel these technologies is best delivered through massive parallelization by projection photolithography. Today, at the smallest features and highest pattern densities attainable, extreme-ultraviolet (EUV) photolithography (Miyazaki and Yen, 2019) at 13.5 nm (92.5 eV) is for the first time being used to produce processors and memories for mobile phones and state-of-the-art graphic processing units. These devices have sub-10-nm features that are separated by distances of less than 30 nm. By increasing the numerical aperture of the EUV projection systems, within the next 5 years the industry intends to produce features that are only separated by 10 nm, which corresponds to a 16 nm pitch. The introduction of EUV into high-volume manufacturing production faced extreme challenges in materials development, characterization, metrology, and lithographic and etch processing. With the coming increase of numerical aperture, EUV photolithography will need to be revamped for the industry to be successful.
Some of the grand challenges for the continued development of EUV photolithography include: enabling new device design and three-dimensional integration; developing new processes and designs as part of a single, symbiotic process (design-technology co-optimization); improving EUV sources to provide higher irradiance at lower power; improving optical design, including wavefront engineering; improving materials for masks and photoresists, including selective atomic-layer deposition and resistless processes; improving feature edge-placement accuracy; development of improved pattern-transfer technologies, including plasma etching; improving materials deposition to enhance uniformity and other characteristics; improving methods for the characterization and metrology of materials; developing new metrology for both surface and in-stack features; reducing stochastic failures from decreased signal-to-noise, inter- and intra-film competing reactions, and variations in substrates of reflective masks (De Bisschop, 2018); understanding and controlling quantum effects; and finding solutions to all of these problems that will help to reduce cost (Robinson and Lawson, 2016).
As powerful as EUV photolithography promises to be, the mask sets are so expensive that it may only ever be a useful technique for high-volume manufacturing. Thus, an important grand challenge is the developments of small-to medium-volume technologies that can attain the same sort of resolution. The utility of such a tool would be immense, as there are many potential uses in high-performance, application-specific integrated circuits and beyond. One possible solution to the problem will be the adaptation of laboratory-scale techniques to the industrial scale, which brings its own set of challenges, including stitching, yield, defect control, throughput, and metrology. Metrology solutions must be either in situ, or else improved placement techniques will be required to ensure that the same area is observed in steps that may employ entirely different patterning methods. There is a pressing need for the further development of automatic image recognition systems, possibly correlated to an image database, to identify and classify defects (Modarres et al., 2017). Developing a framework of quality standards will ease the transition of technologies from the laboratory to the foundry. Standards for nomenclature, metrology, and characterization across laboratory-scale and industrial nanofabrication would also assist in translating methods from the former to the latter.
Another grand challenge in industrial nanofabrication is the continued development of ever more powerful modelling tools, for design, patterning, and device performance. As feature sizes become ever finer, such models must incorporate new, nanoscale physics. This is an area in which artificial intelligence has already made great strides, but far more progress is possible.
Other Challenges
There are a number of grand challenges that transcend the scale of nanofabrication techniques. One such challenge is to develop sustainable, green alternatives to technologies that do not yet meet this criterion (Kim and Fthenakis, 2013). The larger the footprint of the technology, the more important that it be as clean as possible. Another challenge, particularly for laboratory-scale technologies, is the interface between the macroscopic world and nanodevices. These interfaces may involve electronics, optics, fluidics, or other technologies. Additionally, the ability to integrate several patterning technologies in a single device raises the possibility of having a wide range of functionalities on a single nanopatterned substrate. Although there are already key examples of such an approach, there is room for considerable progress.
Conclusion
We have done our best here to lay out what we think are the current grand challenges for nanofabrication, and we are excited to be involved in this new forum for reporting research that addresses these challenges and others in this field. Our goal is to make this section of Frontiers in Nanotechnology a premier, open-access venue for work that addresses fundamental issues in nanofabrication.
Author Contributions
JF, JG, ZH, HL, BM, MN, JP, YS, AV, and YZ conceived of and wrote this article.
Conflict of Interest
Author AV was employed by the company KLA Corporation.
The remaining authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.
Publisher’s Note
All claims expressed in this article are solely those of the authors and do not necessarily represent those of their affiliated organizations, or those of the publisher, the editors and the reviewers. Any product that may be evaluated in this article, or claim that may be made by its manufacturer, is not guaranteed or endorsed by the publisher.
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Keywords: nanofabrication, lithography, self-assembly, EUV lithography, parallel patterning, 3D nanofabrication, top-down fabrication, bottom-up fabrication
Citation: Fourkas JT, Gao J, Han Z, Liu H, Marmiroli B, Naughton MJ, Petersen JS, Sun Y, Vagilio Pret A and Zheng Y (2021) Grand Challenges in Nanofabrication: There Remains Plenty of Room at the Bottom. Front. Nanotechnol. 3:700849. doi: 10.3389/fnano.2021.700849
Received: 26 April 2021; Accepted: 20 September 2021;
Published: 07 October 2021.
Edited by:
Bingqing Wei, University of Delaware, United StatesReviewed by:
Ding Zhao, Westlake University, ChinaCopyright © 2021 Fourkas, Gao, Han, Liu, Marmiroli, Naughton, Petersen, Sun, Vagilio Pret and Zheng. This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) and the copyright owner(s) are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms.
*Correspondence: John T. Fourkas, Zm91cmthc0B1bWQuZWR1