AUTHOR=Yu Yuting , Li Dan , Chu Yanting TITLE=Compensation characterization of the UPQC system under an improved nonlinear controller based on the MSTOGI-PLL device JOURNAL=Frontiers in Energy Research VOLUME=12 YEAR=2024 URL=https://www.frontiersin.org/journals/energy-research/articles/10.3389/fenrg.2024.1393629 DOI=10.3389/fenrg.2024.1393629 ISSN=2296-598X ABSTRACT=

To solve the delay problem of a unified power quality conditioner (UPQC) system during the separation of the fundamental positive-order components and to better filter out the DC and harmonic components to realize accurate phase locking, a mixed second- and third-order generalized integrator phase-locked loop (MSTOGI-PLL) has been designed to replace the traditional synchronous reference frame phase-locked loop (SRF-PLL). Under the premise of adopting the new phase-locking device of MSTOGI-PLL, the active disturbance rejection control (ADRC) controller or the super-twisting algorithm (STA) sliding mode controller is used in the DC voltage control module instead of the traditional PI controller, and the suitability of the two nonlinear controllers with the MSTOGI-PLL device is investigated. First, the new MSTOGI-PLL device is designed, and the new phase-locking method is applied to make the UPQC realize accurate phase locking under the non-ideal situation of the grid voltage containing unbalance, DC component, harmonics, and so on. Based on the above foundation, the ADRC or STA controller is independently adopted to replace the PI controller to construct the UPQC system with the ADRC + MSTOGI phase-locking device and the second-order STA + MSTOGI phase-locking device. Finally, a simulation comparison is carried out in a Simulink simulation platform regarding the UPQC system under different phase-locking devices, and the simulation results demonstrate that MSTOGI-PLL can successfully filter out the DC component and resolve the phase-locking process delay issue. Additionally, the UPQC system with ADRC + MSTOGI-PLL exhibits superior immunity and response speed to the PI controller and the second-order STA controller.