An Active State of Charge Balancing Method With LC Energy Storage for Series Battery Pack

To reduce the impact of series battery pack inconsistency on energy utilization, an active state of charge (SOC) balancing method based on an inductor and capacitor is proposed. Only one inductor and one capacitor can achieve a direct transfer of balanced energy between the highest power cell and the lowest power cell. This method has the characteristics of a simple structure, small size, simple control, fast balancing speed, and low topology cost. First, the topology, working principle, parameter design, and control strategy of the proposed balancing method are explained. Second, the characteristics of the speed and efficiency are analyzed through the simulation models, and the advantages of its low topology cost and simple control are explained. Finally, by building an experimental platform for a four-cell series battery pack, the effectiveness of the new balancing method in the charging/discharging process and the dynamic process of the battery pack is verified. After the end of the balancing, the SOC difference is less than 4%.

1 Introduction

Lithium-ion batteries are widely used in the power systems of new energy vehicles (EVs). Due to the low cell voltage and capacity, battery cells must be connected in series and parallel to form a battery pack in order to meet application requirements (Tang et al., 2020; Cao and Abu Qahouq, 2021; Xia and Abu Qahouq, 2021; Wang et al., 2022). With the increase in the service time of the battery pack, the inevitable inconsistency between the cells will have a serious impact on the energy utilization rate and the cycle life of the battery pack. An effective balancing method must be introduced to alleviate the inconsistency of the battery pack (Ouyang et al., 2018; Shi et al., 2021). The influence of inconsistency on the series battery pack is more prominent than that of the parallel battery pack (Ye et al., 2019), and the state of charge (SOC) can reflect the inconsistency of the cell in real time compared with the voltage and capacity (Zhang et al., 2017). This article focuses on the SOC balancing method of the series battery pack.

According to the different energy transfer modes, the balancing methods are mainly divided into passive balancing and active balancing (Turksoy et al., 2020; Ghaeminezhad et al., 2021). Among them, the active balancing method uses energy storage devices, such as inductors, capacitors, and transformers, to transfer energy. It has the characteristics of a perfect balancing function and high efficiency, which is a prominent area in the research of balancing methods. The balancing method based on inductive energy storage (Xu et al., 2021; Chen et al., 2021; Ding et al., 2020) has a higher accuracy, but it often requires more inductors or switch tubes and is larger in size. The capacitor energy storage balancing method (Shang et al., 2017; Ye et al., 2017; Shang et al., 2018) has the advantages of a small volume and easy control. When the voltage difference between the balancing object and the capacitor changes from large to small, the balancing speed changes from fast to slow, resulting in a low balancing accuracy of capacitor energy storage balancing. In addition, the voltage changes drastically at the initial moment of the capacitor energy storage balancing. If the voltage is used as the balancing index, it will easily lead to overbalancing or underbalancing. The transformer energy storage balancing method (Shang et al., 2020a; Tavakoli et al., 2020; Guo et al., 2021a; Liu et al., 2021a; Conway, 2021; Nazi and Babaei, 2021) has high efficiency and is easy to isolate. However, the winding transformer design is complicated and has a peak voltage. Improper handling may cause serious safety hazards.

In combination with the characteristics of high accuracy of inductive energy storage balancing and a high speed of capacitive energy storage balancing when the voltage difference is large, topologies based on inductor–capacitor (LC) energy storage have gradually become a prominent area in the research of active balancing methods in recent years. The topology proposed by Wei et al. (2021) is based on LC for energy transfer, using fewer energy storage devices; however, it requires designing a dual-winding transformer and the number of switch tubes is large. The topology proposed by Zou et al. (2021) is similar to Wei et al. (2021) in terms of balancing principles. Although the number of switching tubes is reduced, the number of capacitors and windings is significantly increased. Liu et al. (2021b) use LC parallel resonance to eliminate the inrush currents, thereby improving the balancing efficiency. However, each cell must be equipped with four switching tubes and an LC series circuit, which is not conducive to reducing the volume and cost of the balancing system. The energy storage unit proposed by Raeber et al. (2021) contains an inductor, two capacitors, and four switching tubes, where each cell needs to be equipped with two switching tubes. Theoretically, this has a higher balancing efficiency, but the energy storage unit has a larger number of switch tubes, and the control complexity is higher. References (Lee et al., 2015; Shang et al., 2020b; Yu et al., 2020) use an LC series resonant circuit and adopt soft switching technology to switch the charge and discharge loop of the balanced object, which greatly reduces the switching loss of the balancing process. However, the control process is too complicated, and each switch tube needs to accurately calculate the duty cycle. Additionally, the balancing process is a dynamic process of multifactor coupling, and the degree of inconsistency of the balanced object has a high degree of randomness. As a result, its antiinterference ability is poor, and higher requirements are put forward on the switching characteristics of the switch tube and the operation speed of the controller, which is not conducive to hardware implementation. Ye and Cheng (2018) also uses soft-switching technology to reduce switching losses, but each cell must be equipped with an LC series circuit, and the topological cost is high. Uno and Kukita (2019) used a half-bridge converter composed of an LC for energy transfer. The entire topology only needs two switching tubes. However, it can only balance the voltage, and each cell must be equipped with two capacitors, two inductors, and two diodes. Thus, a balanced system volume and cost advantages are not prominent.

Based on the aforementioned analysis, an active SOC balancing method for a series battery pack with LC energy storage is proposed. Compared with the previously mentioned LC balancing method, the number of switching tubes and diodes required is moderate, but the energy storage device only needs one inductor and one capacitor, which can achieve an energy transfer between any cells. On the basis of ensuring the balancing speed and efficiency, it has the characteristics of a simple structure, simple control, and low cost and is suitable for the balancing system of power battery pack consisting of new EVs.

2 Topology Structure and Equalization Principle

2.1 Topology Structure

The new LC energy storage balancing topology is shown in Figure 1. The battery pack consists of n cells. The topology includes 2n+2 MOSFETs, 2n diodes, one inductor, and one capacitor.

FIGURE 1

FIGURE 1. Balancing topology structure.

2.2 Analysis of the Balancing Principle

When the cell with the highest power and the cell with the lowest power have different serial numbers, the balancing principle is different due to the moment of the capacitor charging the inductor. For the convenience of explanation, taking the MATLAB/Simulink model of a four-cell series battery pack as an example, the balancing principle in two situations is analyzed. In the simulation model, the cell capacity is 3.2 Ah, the duty cycles of the control signal for charging and discharging are both 50%, the inductance is 100 μH, the capacitance is 1 μF, the switching frequency is 10 kHz, and the forward voltage drop of the diode is 0.4 V.

Suppose that the power of B₁ is the highest, B₃ is the lowest, and the difference between them is greater than the starting threshold of the balancing circuit. Each switching cycle of the balancing process includes two stages. The current loops of each stage are shown in Figure 2A, and the waveforms of the balancing current and capacitor voltage are shown in Figure 2B.

FIGURE 2

FIGURE 2. The working principle of the power of B₁ is the highest and the B₃ is the lowest. (A) Balancing current loops. (B) Waveforms of the balancing current and capacitor voltage.

In Stage 1, the inductor current at t₁ is zero, and the capacitor voltage is the voltage at the end of the previous cycle. At this moment, MOSFETs S₁ and S₂ are turned on, and the energy is transferred from B1 to the inductor through loop i. The current flowing through the inductor gradually increases. At the same time, the entire battery pack charges the capacitor through loop ii, and the capacitor voltage quickly changes to the battery pack voltage and remains unchanged until time t₂. At t₂, MOSFETs S₁ and S₂ are disconnected, and Stage 1 ends. In Stage 2, MOSFETs S₄ and S₇ are turned on at moment t₂. The inductor charges B₃ through loop iii, and the capacitor charges the inductor through loop iv. Because the capacitor voltage cannot change suddenly, the capacitor will continue to charge the inductor after Stage 1, and the inductor current will continue to increase. When the capacitor voltage is equal to the voltage of B₃, the inductor current reaches the peak and then begins to decrease. The inductor current drops to zero at t₃. Thus, the energy transfer process of one switching cycle is completed. Suppose that the power of B₃ is the highest and B₁ is the lowest. Each switching cycle of the balancing process also includes two stages. The current loops of each stage are shown in Figure 3A, and the waveforms of the balancing current and capacitor voltage are shown in Figure 3B.

FIGURE 3

FIGURE 3. The working principle of the power of B₃ is the highest, and B₁ is the lowest. (A) Balancing current loops. (B) Waveforms of the balancing current and capacitor voltage.

In Stage 1, the inductor current at t₁ is zero, and the capacitor voltage is the voltage of the negative pole of B₁. At this moment, MOSFETs S₅ and S₆ are controlled to be turned on, and B₃ and the capacitor charge the inductor through loops i and ii, respectively. When the capacitor voltage is equal to the voltage of the positive pole of B₄, the capacitor no longer charges the inductor, and the inductor current increases at a slower rate. At t₂, the inductor current reaches the peak, disconnects MOSFETs S₅ and S₆, and ends at Stage 1.

In Stage 2, MOSFETs S₀ and S₃ are controlled to be turned on at moment t₂. The inductor charges B₁ through loop iii, and the inductor current gradually decreases. At the same time, B₂, B₃, and B₄ charge the capacitor through loop iv, and the capacitor voltage increases to the voltage of the negative pole of B₁ again. The inductor current drops to zero at moment t₃. Thus far, the energy transfer process of one switching cycle is completed.

In the aforementioned situations, the inductor must work in discontinuous current mode to avoid inductor hysteresis saturation during the balancing process. In addition, to ensure the reliability of balancing control, there is a dead time after t₃, and the next balanced cycle starts at t₄. Based on the above description, the characteristics of the new balancing method can be summarized as follows:

1) The energy storage device only requires one inductor and one capacitor. The balancing topology structure is simple.

2) In each balancing stage, only two MOSFETs need to be controlled on or off. In addition, in the charging balancing process of a low-power cell, when the inductor current drops to zero, the low-power cell will not charge the inductor in reverse due to the reverse cutoff effect of the diode. This can reduce the topological requirements on the accuracy of the control signals.

3) The balancing function is perfect, which cannot only achieve a balancing of cells to cells but also achieve a balancing of cells to pack or pack to pack.

3 Balancing Parameters Design

To ensure the reliable operation of the balancing process, key parameters, such as switching frequency, duty cycle, inductance, and capacitance, need to be analyzed and calculated. Assuming that B_i has the highest power, MOSFETs S_2i-1 and S_2i are controlled to charge the inductor, where B_j has the lowest power, and MOSFETs S_2j+1 and S_2j-2 are controlled to charge B_j, where i, j = 1,2,…, n, and i ≠ j. For convenience, set the voltage of B_n as V_n, the voltage of the capacitor as V_C, the diode on-voltage drop as V_D, the switching frequency as f, the balancing period as T, the inductance as L, and the capacitance as C. The duty cycle of the inductor charge and discharge process is α and α’. In one balancing cycle, both the high-power cell and capacitor will charge the inductor. Suppose that the charging current of the high-power cell to the inductor is i_B and that the charging current of the capacitor to the inductor is i_C then the expression of the inductor current i_L in an equalization cycle is:

$i_L=i_B+i_C(1)$

For example, when the serial number i of the high-power cell is smaller than the serial number j of the low-power cell, is analyzed as an example. At the beginning of the first stage, MOSFETs S_2i-1 and S_2i are turned on, and the B_i forms a circuit with the inductor L. The B_i charges the inductor L and the inductor current rises linearly. The inductor current flows through the two diodes and the time t of the first stage is αT. Thus, the maximum equalization current I_max caused by B_i can be expressed as:

$I_{\max }=\frac{\alpha T(V_i-2V_D)}{L}(2)$

From Eq. 2, the following can be obtained:

$L=\frac{\alpha (V_i-2V_D)}{I_{\max }f}(3)$

At the beginning of the second stage, the S_2j-2 and S_2j+1 of MOSFET are turned on, and the B_j and the L form a circuit, and the L charges the B_j. At this stage, the inductor current also flows through the two diodes and the inductor current approximately satisfies the ramp function. Write the circuit equation according to Kirchhoff’s voltage law:

$L\frac{di}{dt}+V_j-2V_D=0(4)$

If Eq. 4 is substituted in the aforementioned initial conditions, then:

$-L\cdot {i_L|}_{I_{m\text{ax}}}^0=(V_j-2V_D)\cdot {t|}_{\alpha T}^{(\alpha +\beta )T}(5)$

In an equalization cycle, to ensure the equalization control’s reliability and avoid hysteresis saturation, it is necessary to leave a dead time after the end of inductor charging and discharging before starting the next cycle. This leads to:

$\alpha +{\alpha }^{\prime }<1(6)$

Then the expression of the inductor current i_B in one equalization cycle is:

$i_B=\{\begin{array}{r}\hfill \frac{V_i-2V_D}{L}t,0\le t<\alpha T\\ \hfill \begin{array}{l}\frac{V_i-2V_D}{L}\alpha T-\frac{V_j-2V_D}{L}(t-\alpha T),\alpha T\le t<(\alpha +\beta )T\\ \end{array}\\ \hfill 0,(\alpha +\beta )T\le t<T\end{array}(7)$

When t = T,

$\frac{V_i-2V_D}{L}\alpha T-\frac{V_j-2V_D}{L}(T-\alpha T)<0(8)$

This leads to the setting standards for the duty cycle α of the first stage, which is:

$\alpha <\frac{V_j-2V_D}{V_i+V_j-4V_D}(9)$

In addition, combining Eqs 2, 5 in order to reset the inductor within a switching cycle, it is necessary to satisfy the following:

${\alpha }^{\prime }\ge \alpha \frac{V_i-2V_D}{V_j-2V_D}(10)$

In the first stage, the voltage of the capacitor is:

$V_C\left(\alpha T\right)=V_i+V_{i+1}+\dots +V_n-2V_D(11)$

At the beginning of the second stage, MOSFETs S_2j+1 and S_2j-2 are turned on. Suppose that after Δt, the capacitor voltage is:

$V_C(\alpha T+\text{Δ}t)=V_j+V_{j+1}+\dots +V_n-2V_D(12)$

Based on the Kirchhoff’s law for loop iv in Figure 2A, if the number of cells of the battery pack is expanded to n, there is an equation:

$LC\frac{d^2{V}_C}{d{t}^2}+L\frac{d{i}_B}{dt}=V_j+V_{j+1}+\dots +V_n-V_C+V_D(13)$

Combining the initial conditions, the following can be solved:

$\begin{array}{l}\{\begin{array}{c}{V}_C\left(t\right)=(V_i+V_{i+1}+\dots +V_n-2V_D)\cos \left[{\omega }_0(t-\alpha T)\right]\\ {\omega }_0=\frac{2V_i+V_{i+1}+V_{i+2}+\cdots +V_j-5V_D}{LC},\end{array}\\ \alpha T+\text{Δ}t\ge t\ge \alpha T\end{array}(14)$

Substituting Eq. 12 into Eq. 14, the following can be obtained:

$\begin{array}{l}\text{Δ}t=\frac{LC}{2V_i+V_{i+1}+V_{i+2}+\cdots +V_j-5V_D}\\ \times \arccos \left(\frac{V_j+V_{j+1}+\dots +V_n-2V_D}{V_i+V_{i+1}+\dots +V_n-2V_D}\right)\end{array}(15)$

According to the superposition theorem, the inductor current i_L in this stage is:

$i_L=i_C+i_B=C\frac{d{V}_C}{dt}+i_B,\alpha T\le t\le T(16)$

By solving Eq. 10, it can be determined that when t is equal to the value of Eq. 11, the inductor current i_L is the largest.

$t=\frac{1}{{\omega }_0}\arccos \frac{2V_D-V_j}{{\omega }_0^{2}LC{V}_C\left(\alpha T\right)}+\alpha T(17)$

Substituting Eq. 17 into Eqs 14, 16 to obtain the inductive maximum balancing current I_Lmax:

$\begin{array}{l}{I}_{L\max }=-C{\omega }_0{V}_C\left(\alpha T\right)\sin \left[\arccos \frac{2V_D-V_j}{{\omega }_0^{2}LC{V}_C\left(\alpha T\right)}\right]\\ -\frac{V_j-2V_D}{{\omega }_{0}L}\arccos \frac{2V_D-V_j}{{\omega }_0^{2}LC{V}_C\left(\alpha T\right)}\\ +\frac{V_i-2V_D}{L}\alpha T\end{array}(18)$

The discharging time of the inductor is determined by Eq. 19:

${\alpha }^{\prime }T=\frac{L{I}_{\max }}{V_j-2V_D}+\frac{1}{{\omega }_0}\arccos \frac{2V_D-V_j}{{\omega }_0^{2}LC{V}_C\left(\alpha T\right)}(19)$

When the serial number i of the high-power cell is greater than the serial number j of the low-power cell, the calculation process is similar to what has been mentioned earlier. It is only in the first cycle that the capacitor voltage reaches a high potential, and no energy is released. Starting from the second cycle, the capacitor and the high-power cell charge the inductor together.

After completing the topological function parameter design, the security parameters need to be analyzed. With an increase in the number of cells in the proposed topology, the reverse voltage on the MOSFETs and diode will increase, affecting the topology’s security. For the diode, when B₁ is discharging, the diode corresponding to MOSFET S_2n+1 will withstand the maximum reverse voltage, or when cell B_n is discharging, the diode corresponding to MOSFET S₀ will withstand the maximum reverse voltage. The maximum reverse voltage mentioned earlier is approximately equal to the battery pack voltage. Suppose the reverse breakdown voltage of the diode is V_DBR, and the drain-source breakdown voltage of the MOSFET is V_MBR. The diode and MOSFET selection process must ensure the following:

${\displaystyle \sum _{i=1}^n{V}_i<V_{DBR}},{\displaystyle \sum _{i=1}^n{V}_i<V_{MBR}}(20)$

Finally, the efficiency of the balancing topology needs to be studied. The MOSFETs used in the balancing experiment in this article are STMicroelectronics IRF630, and its on-drain-source resistance R_DS is 0.3 Ω. Its switching loss and cutoff loss are very small compared to the on-state loss and are therefore negligible. The Schottky diode used is STMicroelectronics 1N5819. The diode voltage drop V_D is 0.4 V under the average forward current of a 1 A conduction state, and its switching loss and cutoff loss are negligible. The capacitance is on the order of μF, and the power consumption can also be ignored. Based on this, for the convenience of calculation, an approximate study of the balancing efficiency is conducted based on the energy change during the charging and discharging process of the inductor.

Assume that the energy released by the high-power cell B_i in one switching cycle is W_i. W_i is then the sum of the energy stored in the inductor and the energy loss in the balancing path. This can be expressed by Eq. 21:

$W_i={\displaystyle {\int }_0^{\alpha T}(i_{B}L\frac{d{i}_B}{dt}+2V_D{i}_B+2R_{DS}{i}_B^2)dt}(21)$

Combining Eqs 2, 21:

$W_i=\left(\frac{1}{2}+\frac{V_D}{V_i-2V_D}+\frac{2\alpha T{R}_{DS}}{3L}\right)\frac{{\alpha }^2{T}^2{(V_i-2V_D)}^2}{L}(22)$

Assume that the energy absorbed by the low-power cell B_j is W_j. Then, W_j is the difference between the energy released by the inductor and the energy loss from the balancing path. It can be expressed by Eq. 23:

$W_j={\displaystyle {\int }_0^{\alpha T}{i}_{B}L\frac{d{i}_B}{dt}dt}-{\displaystyle {\int }_{\alpha T}^{(\alpha +{\alpha }^{\prime })T}(2V_D{i}_B+2R_{DS}{i}_B^2)dt}(23)$

$\begin{array}{l}{W}_j=\left(\frac{1}{2}-\frac{V_D}{V_j-2V_D}-\frac{2\alpha T{R}_{DS}}{3L}·\frac{V_i-2V_D}{V_j-2V_D}\right)\\ \times \frac{{\alpha }^2{T}^2{(V_i-2V_D)}^2}{L}\end{array}(24)$

Assume that the balancing efficiency is η. According to the change in energy before and after balancing in one switching cycle, η can be expressed as:

$\begin{array}{l}\eta =\frac{W_j}{W_i}=\left(\frac{V_i-2V_D}{V_j-2V_D}\right)\\ \times \frac{3Lf(V_j-4V_D)-4\alpha R_{DS}(V_i-2V_D)}{3Lf{V}_i+4\alpha R_{DS}(V_j-2V_D)}\end{array}(25)$

It can be seen from Eq. 25 that the factors that affect the balancing efficiency include the product of the inductance and the switching frequency, the voltage drop of the diode, and the duty cycle of the MOSFETs, and the voltage of the balanced object. In the experiment, first, the maximum balancing current needs to be set. Second, set the inductance, capacitance, switching frequency, and duty cycle are set based on the maximum balancing current. The fourth part of the article will determine the specific experimental parameters through a comparative analysis based on the simulation models.

4 Adaptive Balancing Control Strategy

In the balancing process, the balanced threshold is set first, and then the balanced object is determined. Suppose the highest SOC in the battery pack is S_max, the lowest SOC is S_min, and the balanced threshold is S_ref. If the difference between S_max and S_min is greater than S_ref, then balancing is started by turning on or turning off the corresponding MOSFETs. Otherwise, the balancing circuit does not work. In addition, if the number of cells with the highest or lowest SOC is not 1, the cells with the closest sequence numbers will be equalized first. The flow chart of the adaptive balancing control is shown in Figure 4.

FIGURE 4

FIGURE 4. Flow chart of the adaptive balancing control strategy.

5 Balancing Performance Analysis

This section mainly includes an analysis of the balancing speed and efficiency of the new balancing method under different conditions, a comparative analysis of the balancing speed and efficiency between the new balancing method and the similar LC energy storage balancing method, a balancing topology cost analysis, and a balancing control mode analysis.

5.1 Analysis of the Balancing Speed and Efficiency of the New Method

Taking the balancing of the four-cell battery pack in the idle state as an example, the balancing speed and efficiency are analyzed by building the simulation models in MATALB/Simulink. The cell parameters are shown in Table 1.

TABLE 1

TABLE 1. Battery parameters.

It can be seen from the parameter design process in Section 3 that the main factors affecting the balancing speed and efficiency include such parameters as the switching frequency, duty cycle, inductance, and capacitance. First, this section uses cell-to-cell balancing as an example to verify the balancing speed and efficiency. The principle of duty cycle design is to make the inductor in a critical saturation state during each switching cycle. Second, in conjunction with the parameter design process in Section 3, the performance of the balancing speed and efficiency under different switching frequencies, inductances, and capacitances is studied through simulation models. To be consistent with the actual standard value of inductance and capacitance, nine groups of different values are set for the balancing speed and efficiency analysis. The balancing efficiency is calculated based on the change in the capacity of the battery pack before and after balancing. The simulation model parameters are shown in Table 2; Figure 5 shows the simulation results.

TABLE 2

TABLE 2. Simulation parameters of the balancing model.

FIGURE 5

FIGURE 5. Simulation results of the balancing efficiency and time. (A) Balancing efficiency and time for a 1 μF capacitor. (B) Balancing efficiency and time for a 4.7 μF capacitor. (C) Balancing efficiency and time for a 10 μF capacitor.

It can be seen from Figure 5 that for the balancing efficiency, when the capacitance is 1 μF, compared with the other two values, the balancing efficiency is the highest. This is because the smaller the capacitance, the smaller the loss. When the switching frequency is small, large, or approximately equal to the LC resonance frequency, the balancing efficiency is reduced. The reason is that when the switching frequency is small or approximately equal to the resonance frequency of the LC series circuit, the balancing current is large, which in turn leads to large losses in the energy storage device and a lower balancing efficiency. When the switching frequency is large, the balancing current is small, but the switching loss increases, and the balancing efficiency decreases.

It should be noted that when the capacitance is 10 μF and the inductance is 47 and 80 μH, if the switching frequency is greater than the resonance frequency, then the balancing efficiency does not increase. The reason is that when the switching frequency is greater than the resonance frequency, the switching loss has a greater impact on the balancing efficiency than the resonance frequency. In addition, when the capacitance is 10 μF and the inductance is 80 μH, when the switching frequency is low, due to the large capacitance and inductance, under the same conditions the balancing current is still small, resulting in high efficiency.

For the balancing speed under the same conditions, when the inductance is 33 μH, the balancing speed is the fastest. This is because the smaller the inductance, the faster the inductor current increases or decreases. When the switching frequency is small, or approximately equal to the series resonance frequency of the LC circuit, the balancing current is large, and the balancing speed is fast. When the switching frequency is large, the balancing current is small, and the balancing speed decreases. For the balancing current, the larger is not better; the greater the balancing current, the greater the impact it has on the battery’s charge or discharge efficiency and the aging process. In summary, when the switching frequency is 10 K, the overall balancing efficiency is high, and the balancing speed is moderate. In the experimental part of this article, the final selection of the control signal switching frequency is 10 kHz, and the inductance and capacitance are 33 μH and 1 μF, respectively.

5.2 Comparative Analysis of the Balancing Speed and Efficiency

For a comparative analysis, the balancing methods in Shang et al. (2020b) and Yu et al. (2020), which are also LC energy storage, are used as the comparison object, and the simulation models are established in MATLAB/Simulink with a battery pack composed of four cells. The topologies in Shang et al. (2020b) and Yu et al. (2020) are based on LC series resonance for balancing. Before and after balancing, the voltage difference of the balancing object will affect both the balancing speed and efficiency. This section compares the speed and efficiency of different initial difference conditions and different balancing modes (three cells to one, two cells to one, and one cell to one). The basis of each model parameter setting is to make the balancing current as large as possible, so the balancing effect is as good as possible. The simulation parameters are shown in Table 3.

TABLE 3

TABLE 3. Key simulation parameters of the balancing model.

$S_b=\frac{C\cdot {\displaystyle \sum _{i=1}^{i=4}\left|SO{C}_{i,initial}-SO{C}_{i,end}\right|}}{t}(26)$

${\eta }_b=\frac{{\displaystyle \sum _{i=1}^{i=4}SO{C}_{end}}}{{\displaystyle \sum _{i=1}^{i=4}SO{C}_{initial}}}\times 100\%(27)$

The balancing speed is defined as the energy transferred per unit of time, and the expression is shown in Eq. 26. The balancing efficiency is defined as the ratio of the sum of the SOC of the battery pack before and after balancing (Guo et al., 2021b), and the expression is shown in Eq. 27. The simulation time is set to 50 s, and the results are shown in Figures 6, 7.

FIGURE 6

FIGURE 6. Balancing speed comparison.

FIGURE 7

FIGURE 7. Balancing efficiency comparison.

It can be seen from Figure 6 that when one cell is balanced by one cell, the new topology balancing speed is the fastest, while when one cell is balanced by multiple cells at the same time, the topological balancing speed of reference (Yu et al., 2020) is faster. This shows that when the voltage difference of the balanced object is not large, then the new topology balancing speed is the fastest, and when the voltage difference of the balanced object is large, the balancing speed of references (Shang et al., 2020b; Yu et al., 2020) is faster. The initial SOC difference has almost no effect on the new topology and the reference (Shang et al., 2020b) topology. When one cell is balanced by three cells, as the initial SOC difference increases, the balancing speed of reference (Yu et al., 2020) also tends to increase. In general, when one cell is balanced by one cell, the new topology has a relatively obvious speed advantage. When one cell is balanced by multiple cells, the new topology no longer has a speed advantage.

It can be seen from Figure 7 that when one cell is balanced by one cell, the efficiency of the new topology is lower, while when one cell is balanced by multiple cells, the topological balancing efficiency of references (Shang et al., 2020b; Yu et al., 2020) decreases significantly, while the new topology shows almost no decrease. When one cell is balanced by three cells, the topology in Yu et al. (2020) increases with an increase of the initial SOC difference, and the balancing efficiency first increases and then decreases.

It can be seen from Figures 6, 7 that for the new topology, when the balancing mode changes, although the balancing speed and efficiency also change, the change is not obvious. The initial SOC difference has almost no effect on the balancing speed or efficiency. For the topologies in Shang et al. (2020b) and Yu et al. (2020), as the balancing mode changes, the balancing speed increases while the efficiency decreases. This is because as the balancing speed increases, the balancing current increases, which leads to an increase in the loss of the energy storage device, and then the balancing efficiency decreases. The new topology balancing mode changes, the balancing speed increases, and the balancing efficiency drops by less than the reference topologies (Shang et al., 2020b; Yu et al., 2020). The reason is that achieving the same balancing effect does not require resonance, the balancing current is small, and the loss of the energy storage device is small.

In summary, compared with the current mainstream LC energy storage topologies, when one cell is balanced by one cell, the balancing speed is faster, and when one cell is balanced by multiple cells, the balancing efficiency is high.

5.3 Analysis of the Topological Cost and Volume

Take the 18,650 ternary lithium battery pack composed of 4 cells, 8 cells, and 12 cells as examples. The unit price of each device is determined based on the references (Shang et al., 2019; Shang et al., 2020b), and the new topology is compared with the current mainstream topologies. The specific analysis results are shown in Figure 8. Component cost per unit ($): MOSFET (0.2), Diode (0.03), Winding (0.2), Transformer Core (0.5), Inductor (0.25), Capacitor (0.25).

FIGURE 8

FIGURE 8. Analysis of the topological cost.

It can be seen from Figure 8 that the cost of the new topology has decreased compared with the current mainstream topologies. As the number of cells increases, the cost advantage becomes increasingly obvious. The topology proposed by Ding et al. (2020) uses the inductor for energy transfers. When the number of cells is small, the cost is lower, while as the number of cells increases, the number of required inductors also increases, which increases the cost and volume. The number of switch tubes used, proposed by Shang et al. (2018) is small, but as the number of cells increases, the number of capacitors increases significantly, which in turn leads to an increase in the topological cost. The topologies in Liu et al. (2021a) and Nazi and Babaei (2021) are based on the transformer to transfer energy, where the cost is low and the change in the number of cells does not cause a significant increase in cost. However, each module or cell needs to be equipped with a winding, which is not conducive to the reduction of the balancing system volume. The topologies in Shang et al. (2020b), Yu et al. (2020), Liu et al. (2021b), and Raeber et al. (2021) are based on LC energy storage to transfer energy. In the topology proposed by Liu et al. (2021b) each cell must be equipped with an LC series circuit, which greatly increases the volume and cost of the system. The energy storage device in Raeber et al. (2021) requires one inductor and two capacitors, and the references (Shang et al., 2020b; Yu et al., 2020) only need one inductor and one capacitor. Although the topological switch array in Shang et al. (2020b), Yu et al. (2020), and Raeber et al. (2021) does not need diodes, the number of switch tubes is large, which in turn leads to a higher cost. Compared with the current mainstream topologies, this new topology requires an inductor and a capacitor, and each cell needs to be equipped with two switching tubes, which is beneficial for reducing the balancing system volume. Although the topology requires a large number of diodes, the volume and cost of diodes are much smaller than those of switching tubes, which is beneficial for reducing system cost and volume. In summary, the proposed topology has a significant advantage in terms of the cost and volume of the balancing system.

5.4 Fault Tolerance Analysis of the Control Signal Duty Cycle

Simple switch control is another significant characteristic of the new topology. The new topology switch array unit and the switch array unit are based on the common topologies of LC energy storage (Shang et al., 2020b; Yu et al., 2020; Liu et al., 2021b; Raeber et al., 2021) are shown in Figure 9.

FIGURE 9

FIGURE 9. Switch array unit. (A) New topology switch array unit. (B) Common topology switch array unit.

In Figure 9A, S₁ is turned on and cell B is charged. When the charging current drops to zero, even if the drive signal of S₁ still exists, cell B will not be discharged through S₁, because the diode is reversely cut off. In Figure 9B, S₂ and S₃ share a driving signal. S₂ and S₃ are turned on, and cell B is charged. When the charging current drops to zero, S₂ and S₃ must be turned off immediately otherwise cell B will be discharged through S₂ and S₃, which will affect the balancing effect and even lead to failure of the balancing. If S₂ and S₃ are turned off early, then the energy storage device may be saturated. In addition, when the balancing object changes, the duty cycle of the switch control signal in Figure 9B needs to be recalculated to ensure smooth switching of the cell charge and discharge circuit, which puts forward higher requirements in terms of the computing power of the controller. In summary, the fault tolerance of the new topology control signal duty cycle is significantly higher than the current common topologies, and the applicability to all cells in the pack is better.

6 Balancing Experimental Analysis

6.1 State of Charge Acquisition Experiment

Obtaining an accurate SOC of each cell appropriately is the premise of taking SOC as the balancing index. The existing SOC acquisition methods include the ampere-hour (Ah) integration method, the open-circuit voltage (OCV) method, the mathematical model method, etc. (Shen et al., 2019). Among them, the Ah integration method has the advantage of a simple measurement. In this article, the Ah integration is used to calculate the SOC of each cell. The key to using Ah integration is to collect an accurate balancing current. Considering that the balancing current in the hardware experiment is relatively small, the current probe cannot obtain an accurate current value, so in this article, the current sampling circuit is used to collect the balancing current of each cell. The specific steps are as follows: first, the sampling resistance is connected in series with the positive pole of each cell. Second, a voltage amplifier circuit designed based on the high-precision integrated operational amplifiers LM124 and OP07 is used to collect the voltage across the sampling resistor. Then, the output value of the voltage sampling circuit is divided by the sampling resistor to obtain the current value on each cell. Finally, the current value is integrated to obtain the change in the SOC and then combined with the initial SOC to obtain the actual SOC during the balancing process. The four-channel current sampling circuit based on LM124 and OP07 is shown in Figure 10.

FIGURE 10

FIGURE 10. The four-channel current sampling circuit.

6.2 Balancing Experimental Parameters Setting

To verify the effectiveness of the new balancing method, a four-cell series battery pack balancing experiment platform, as shown in Figure 11, was built. The single cell is the 18650 ternary lithium battery produced by Sony Corporation of Japan, with a nominal voltage of 3.7 V and a rated capacity of 3.2 Ah.

FIGURE 11

FIGURE 11. Balancing experimental platform.

Based on the parameter design of Section 3 and the simulation analysis of Section 5, the balancing experiment parameters shown in Table 4 are designed. Among them, PWM1 and PWM2 are the control signals of the first stage and the second stage of each switching cycle.

TABLE 4

TABLE 4. Balancing experiment parameters.

6.3 Experimental Analysis of the Balancing Function

Set B₂ SOC to be the highest and B₃ SOC to be the lowest. The waveform of the inductor current in the five switching cycles and the waveforms of the cell voltage change over two switching cycles are shown in Figure 12.

FIGURE 12

FIGURE 12. The experimental waveforms where the B₂ SOC is the highest and the B₃ SOC is the lowest. (A) PWM1, PWM2, and inductor current waveforms. (B) Voltage waveforms of each cell.

Figure 12A shows that in the first stage of each switching cycle, the current through the inductor is zero at the initial moment. At this moment, MOSFETs S₃ and S₄ are turned on, B₂ starts to charge the inductor, B₂, B_3, and B₄ charge the capacitor, and the inductor current gradually increases. When the inductor current gradually increases to the set value, MOSFETs S₃ and S₄ are disconnected, and MOSFETs S₄ and S₇ are simultaneously turned on. The inductor starts to charge B₃, and the capacitor charges the inductor. The inductor current first rises for a short time, and then gradually decreases to zero. It can be seen from Figure 12B that in the first stage, since B₂ charges the inductor and B₂, B_3, and B₄ charge the capacitor, the voltage of each cell has a certain drop. After the charging is completed, due to the polarization effect, they rise again. In the second stage, the inductor charges B₃, and the voltage of B₃ rises. After the inductor current drops to zero, the voltage of B₃ drops again due to the polarization effect.

Set the B₄ SOC to be the highest and the B₂ SOC to be the lowest. The waveform of the inductor current in five switching cycles and the waveforms of the cell voltage change in two switching cycles are shown in Figure 13.

FIGURE 13

FIGURE 13. The experimental waveforms where the B₄ SOC is the highest and the B₂ SOC is the lowest. (A) PWM1, PWM2, and inductor current waveforms. (B) Voltage waveforms of each cell.

Figure 13A shows that in the first stage of each switching cycle, the current through the inductor is zero at the initial moment. At this moment, MOSFETs S₇ and S₈ are turned on, and B₄ and the capacitor start to charge the inductor. After the capacitor power is released, only B₄ continues to charge the inductor, and the inductor current rises faster at first and then slower. When the inductor current gradually increases to the set value, MOSFETs S₇ and S₈ are disconnected, and MOSFETs S₂ and S₅ are simultaneously turned on. The inductor starts to charge B₂, and B_3, and B₄ charge the capacitor. The inductor current gradually decreases to zero. It can be seen from Figure 13B that in the first stage, since B₄ charges the inductor, the voltage of B₄ has a certain drop. After charging is completed, due to the polarization effect it rises again. In the second stage, the voltage of B₂ rises; after the inductor current drops to zero, it drops again due to the polarization effect. At the same time, B₃ and B₄ charge the capacitor, and the voltages of B₃ and B₄ decrease. After the inductor current drops to zero, the voltages of B₃ and B₄ rise again due to the polarization effect.

6.4 Experimental Analysis of the Balancing Effect

To verify the overall balancing effect of the new method, the following three sets of balancing experiments are designed. Namely, the battery pack charging (0.7A) balanced experiment, the discharging (0.7A) balanced experiment, and the dynamic balanced experiment. The dynamic balancing experiment was first charged with a 0.7 A current for 30 min, then left for 30 min, and finally discharged with a 0.7 A current for 15 min. The SOC change curve of each cell during the balancing process is shown in Figure 14, and the change in the SOC of each cell before and after equalization balancing is shown in Figure 15.

FIGURE 14

FIGURE 14. Battery pack balancing experiment waveforms. (A) Equalization of the battery pack charging process. (B) Equalization of the battery pack discharging process. (C) Dynamic equalization.

FIGURE 15

FIGURE 15. SOC change before and after equalization.

It can be seen from Figure 15 that at the initial moment, the SOC inconsistency of the cells satisfies the start-up condition of the balancing circuit, and the balancing circuit starts to work. At the end of balancing, the SOC difference between the individual cells is less than 4%, which meets the stop condition of the balancing circuit. Figures 14, 15 show that the new balancing method has a good equalization effect on the charging/discharging process and the state of shelving, and can significantly improve the consistency of the series battery pack.

7 Conclusion

To improve the SOC consistency of the series battery pack, a new balancing method based on LC energy storage was proposed, which has the advantages of a simple structure, simple control, and low cost. First, the working principle, parameter design, and control strategy were analyzed in detail. Second, through a comparison of simulation models and topology structure, the characteristics of the new balancing method in terms of a balanced speed, efficiency, and significant topology cost advantages were proven. Finally, a four-cell series battery pack balanced experimental platform was built to verify the overall balanced effect of the new method under battery pack charging, discharging, and dynamic conditions. The SOC difference of each cell can be controlled to within 4%. In the future, the SOC estimation accuracy can be improved to further improve the balancing accuracy.

Data Availability Statement

The original contributions presented in the study are included in the article/Supplementary Material; further inquiries can be directed to the corresponding author.

Author Contributions

Conceptualization, XX and CX; methodology, XX; software, XG; validation, CX, QW, and XG; formal analysis, QW; investigation, XG; resources, XX; data curation, CX; writing—original draft preparation, XX; writing—review and editing, CX and XG; visualization, WQ; supervision, XG; project administration, YZ and WQ.

Funding

This work was supported in part by the National Natural Science Foundation of China, under Grant 52177039, and in part by the Fundamental Research Funds for the Universities of Henan Province, under Grant NSFRF210332.

Conflict of Interest

The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

Publisher’s Note

All claims expressed in this article are solely those of the authors and do not necessarily represent those of their affiliated organizations, or those of the publisher, the editors and the reviewers. Any product that may be evaluated in this article, or claim that may be made by its manufacturer, is not guaranteed or endorsed by the publisher.

Acknowledgments

XX would like to express my deepest gratitude to WQ, who has provided me with valuable guidance at every stage of writing this article. I would also like to thank the reviewers for dedicating the time to review my article despite their busy schedules.

Supplementary Material

The Supplementary Material for this article can be found online at: https://www.frontiersin.org/articles/10.3389/fenrg.2022.901811/full#supplementary-material

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