Mechanism of Power Quality Deterioration Caused by Multiple Load Converters for the MVDC System

Medium-voltage direct current (MVDC) systems are widely used to ship power-distributed systems, wind farms, and photovoltaic power plants. With the increase of load converters interfacing into the MVDC system, the power quality deteriorates. Few research studies focused on the factors affecting the MVDC power quality, and effects caused by multiple load converters are often neglected. In this study, the mechanism of power quality deterioration caused by interfacing multiple load converters on the MVDC system has been discussed. The impedance model of the MVDC system is developed with the state-space averaging method and the small-signal analysis method. A three-level H-bridge DC/DC converter is employed as the load converter. The results by the analysis of the impedance model show that the more the load converters connect to the MVDC system, the more fragile the MVDC system is to background harmonics. Simulation cases are implemented to verify this conclusion.

1 Introduction

In recent years, medium-voltage direct current (MVDC) systems have been gradually applied to ship power-distributed systems (Su et al., 2016; Mo and Li, 2017). The rated voltage levels of the MVDC system include 1.5, 3, 6, 12, 18, 24, and 30 kV. The power quality of the MVDC system starts to receive attention. The research on this field mainly focused on the measurement and evaluation of the power quality (Crapse et al., 2007; Ouyang and Li, 1646; Shin et al., 2004) and the way to improve it (Xie and Zhang, 2010; Puthalath and Bhuvaneswari, 2018; Arcidiacono et al., 2007). Few references discuss the factors that degrade the power quality. The reference by Steurer et al., (2007) explored the impact of the pulsed power charging loads on power quality. This study used high-precision modeling and simulation to analyze the problem without a deeper theoretical analysis. The reference by Sulligoi et al., (2017) mentioned that the multi-load converter connected to the MVDC system may lead to unstable bus voltage and deteriorate the power quality, yet the impact mechanism was not explained in detail. On this basis, this study discusses the mechanism of the multi-load converter's influence on power quality. In addition to the influence of the number of load converters on the power quality, the characteristics of the load converter itself are also considered.

At present, there are mainly three types of converters used in MVDC systems: the modular multilevel converter (MMC), three-level DC converter, and dual active bridge (DAB) converter. The power switches in the MMC structure withstand less voltage stress and generate less electromagnetic interference (Mo et al., 2015; Kenzelmann et al, 2011; Ferreira, 2013), which is conducive to better power quality. The application of wide bandgap devices such as SiC MOSFETs can reduce the stages of the MMC, thereby reducing the complexity of the MVDC system (Zhao et al., 2020; Zhao et al., 2021). The DAB has a good soft-switching performance and can achieve higher efficiency (Yanhui Xie et al., 2010; Zhao et al., 2017). The circuit topology of the three-level DC converter is relatively simple, easy to control, and more stable (Xiao et al., 2014; Xinbo Ruan et al., 2008). These three types of converters have their own characteristics. As for load converters, they can all be regarded as constant power loads with negative resistance, which introduce the system instability concern.

In prior to analyzing the influence of the network formed by the connection of multiple load converters on power quality, a suitable system model should be established. Many [references] have proposed modeling methods for MVDC systems. The reference by Khan et al., (2017) divided the MVDC system into three parts, including the power system, load system, and energy storage system, and established a detailed transient simulation model. The reference by Ji et al., (2018) described the system with an adjacency matrix and proposed a hierarchical control based on the system matrix. The reference by Tan et al., (2017) proposed a convex model for MVDC systems to study the transmission losses. The modeling methods mentioned in the studies by Khan et al., (2017); Tan et al., (2017); and Ji et al., (2018) were all for specific research purposes and could not be used to analyze the system state in general. References by Shi et al., (2015); Bosich et al., (2017); and Sulligoi et al., (2017) used the state-space averaging model and the small-signal analysis method to analyze the dynamic process of the system and then proposed a corresponding control strategy to maintain the stability of the bus voltage. Among them, the load converter model was taken as a constant power load model with a controlled current source connected in parallel with a capacitor. The parallel connection of multiple constant power load models is equivalent to a constant power load model, while this model is not appropriate for investigating the interactions of different load converters. The reference by Liu et al., (2017) utilized impedance modeling to analyze the stability and harmonics of the MVDC system including the power generation system and the motor drive system, while the influence of multiple load converters is also ignored. Although the models in references by Shi et al., (2015); Bosich et al., (2017); Liu et al., (2017); Sulligoi et al., (2017) cannot be used to describe the effects of multi-load converters, the modeling method can be used to analyze the system state.

In view of the above problems, this study explores the mechanism of the multi-load converter affecting the power quality based on the impedance network analysis method. An MVDC system with four load regions is taken as an example. A three-level H-bridge DC converter is used as the load converter. The state-space averaging method and the small-signal analysis method are used to establish the impedance model of the load converter; then, the impedance network of the system is established. Through comparing the system impedance spectrum under different numbers of load converters, the influence of the number of load converters on power quality is revealed.

The contribution of this study is as follows.

(1) This study reveals for the first time that an increase in the number of load converters will increase the probability of background harmonics being amplified in the MVDC system and make the system more susceptible to low-frequency background harmonics.

(2) The impedance model of the MVDC system is established by using the state-space averaging method and the small-signal analysis method to analyze the spectrum change of the system resonance point, and the mechanism of the power quality deterioration of the MVDC system caused by the multi-load converter is revealed.

The rest of this study is organized as follows. A modeling method of MVDC systems is proposed in Section 2. In Section 3, the input impedance model of the three-level H-bridge DC converter is introduced. On the basis, the influence of load converters on power quality is analyzed in Section 4, and the mechanism of the influence is verified in Section 5. Section 6 concludes the full text.

2 Modeling of an MVDC System

Figure 1 shows the network architecture of the MVDC system. Its configuration includes the following parts: 1) one power generation module (PGM); 2) one MVDC system bus; and 3) one to four load areas. The PGM is connected to the bus through a three-phase rectifier bridge, and the load area is connected to the bus through a three-level H-bridge DC converter. It is assumed that there are background harmonics on the output side of the three-phase rectifier bridge, which affects the power quality of the DC bus. To simplify the analysis, the output impedance of the PGM is ignored, and the load on the output side of the three-level H-bridge is replaced by a pure resistance. Finally, the small-signal model of the MVDC system shown in Figure 2 is obtained. The inductance and the resistance are represented by a series of Z_line in Figure 2. The input impedance of the load converter can be derived from equations 3 and (4).

FIGURE 1

FIGURE 1. MVDC distribution system network.

FIGURE 2

FIGURE 2. Small-signal model of the MVDC system.

3 Input Impedance Model of the Three-Level H-Bridge DC Converter

The topology of the three-level H-bridge DC converter is shown in Figure 3. C_g is the voltage equalizing capacitor on the output side. R_C is the equivalent resistance of the voltage equalizing capacitor. S₁∼S₈ are the switching tubes on the inverter side. D_c1∼D_c4 are the clamping diodes. The transformation ratio of the intermediate frequency transformer T_m is 1:N_T. L and C are the output filter parameters, and R is the load. u_d is the input voltage, and i_d is the input current. i_L is the current on L. u_o is the output voltage. u_P is the voltage of the upper-end equalizing capacitor. u_N is the voltage of the lower-end equalizing capacitor. u_T1 is the primary side voltage of the transformer, and its direction is specified as the direction shown in Figure 3.

FIGURE 3

FIGURE 3. Topology of the three-level H-bridge DC/DC converter.

In this model, it is assumed that the frequency of the equalizing control loop is high; the influence of the control loop can be ignored. As a result, the switch devices in the figure are all ideal devices, and the transformer is an ideal transformer. Through the analysis, the working waveforms of the converter can be obtained, as shown in Figure 4, and the simplified model of Figure 3 can be obtained, as shown in Figure 5 (Zhao et al., 2017).

FIGURE 4

FIGURE 4. Working waveforms of three-level H-bridge with phase-shift control.

FIGURE 5

FIGURE 5. Simplified circuit of the three-level H-bridge DC/DC converter. (A) Left half equivalent circuit (B) Right half equivalent circuit.

According to Figures 4, 5, the state equations for the eight operating states (a∼h) of the three-level H-bridge converter can be listed in Table 1.

TABLE 1

TABLE 1. The equation of state for the converter.

Based on the previous assumptions, it can be obtained that

$u_P=u_N=\frac{u_d}{2}-R_C{C}_g\frac{d{u}_P}{dt}.(1)$

Assuming that the converter is controlled by a single voltage loop, the relationship between the conduction angle d_α and the output voltage u_o can be expressed as

$d_{\alpha }=k_p(u_o^{\ast }-u_o)+k_i{\displaystyle \int (u_o^{\ast }-u_o)dt},(2)$

where k_p and k_i are the parameters of the PI controller, and $u_o^{\ast }$ is the reference of the output voltage. With the state-space averaging method and the small-signal analysis method, the transfer function from the input voltage to the input current can be obtained.

$G_t\left(s\right)=\frac{C_{g}s}{2(R_C{C}_{g}s+1)}+\frac{4C{D}_{\alpha }^2{N}_{T}R{s}^2+(4N_T{D}_{\alpha }^2-4I_L{N}_{T}R{k}_p{D}_{\alpha })s-4D_{\alpha }{I}_L{N}_{T}R{k}_i}{RLC{s}^3+L{s}^2+(R+2N_T{U}_d{k}_{p}R)s+2N_{T}R{U}_d{k}_i}.(3)$

Therefore, the input impedance of a three-level H-bridge converter can be expressed as

$Z_t\left(s\right)=\frac{1}{G_t\left(s\right)}.(4)$

4 Influence of the Load Converter on Power Quality

In order to analyze the influence of multi-load converters on power quality, the input voltage u_t and input current i_t of the load area closest to the PGM (hereinafter referred to as load area 1) are taken as an example for analysis. It is denoted that the equivalent input impedance of n load regions is Z_n. Thus, it can be deduced from Figure 2 that the expression of Z_n is

$Z_n\left(s\right)=\{\begin{array}{l}{Z}_t\left(s\right)\text{ n}=1\\ \frac{1}{1/Z_t\left(s\right)+1/\left(Z_{n-1}\left(s\right)+Z_{\text{line}}\left(s\right)\right)}\text{ n}\ge 2\end{array}.(5)$

u_t and i_t can be expressed as

$u_t\left(s\right)=\frac{Z_n\left(s\right)}{Z_n\left(s\right)+Z_{\text{line}}\left(s\right)}{u}_g,(6)$

$i_t\left(s\right)=\frac{Z_n\left(s\right)}{Z_t\left(s\right)\left(Z_n\left(s\right)+Z_{\text{line}}\left(s\right)\right)}{u}_g\left(s\right),(7)$

where u_g is the background harmonic, and n ranges from 1 to 4.

Equations 6 and 7 reflect that the input voltage and current in load region 1 are affected by its self-impedance, impedance of other load regions, and the background harmonics. The transfer function from u_g to u_t is denoted by T_U(s), and the transfer function from u_g to i_t is denoted by T_I(s). Then, their expressions are shown in the following formulas.

$T_U\left(s\right)=\frac{u_t\left(s\right)}{u_g\left(s\right)}=\frac{Z_n\left(s\right)}{Z_n\left(s\right)+Z_{\text{line}}\left(s\right)},(8)$

$T_I\left(s\right)=\frac{i_t\left(s\right)}{u_g\left(s\right)}=\frac{Z_n\left(s\right)}{Z_t\left(s\right)\left(Z_n\left(s\right)+Z_{\text{line}}\left(s\right)\right)}.(9)$

The spectral changes of T_U(s) and T_I(s) reflect the influence degree of multi-load converters on power quality. With different n, two transfer functions are calculated, and their Bode plots are shown in Figure 6. The parameters of the converter are listed in Table 2.

FIGURE 6

FIGURE 6. Bode diagrams of T_U(s) and T_I(s) under different numbers of load zones (A) Bode diagrams of TU(s) (B) Bode diagrams of TI(s).

TABLE 2

TABLE 2. Parameters of the converter.

It can be seen from Figure 6 that with the increase of the load converter number, the resonance point in the Bode diagram increases, and the original resonance peak frequency becomes lower. The resonance peak in the figure indicates that the background harmonics are amplified at this resonance point. The increase of resonance points means that the system is more susceptible to the influence of background harmonics. Lower resonant peak frequencies mean that the system is more susceptible to low-frequency disturbances, which are often difficult or expensive to filter out.

5 Case Study

In order to verify the above analysis results, a simulation model of the MVDC system based on the MATLAB/Simulink platform is established with an architecture shown in Figure 1. The PGM is replaced by an ideal voltage source, and a broad-spectrum white noise is superimposed on the ideal voltage source as background harmonics. The number of load zones varies from 1 to 4. The voltage and current on the input side of load area 1 are measured, and the measured data are subjected to fast Fourier transform (FFT) analysis (Li, 2021a; Li, 2021b; Li, 2022). The analysis results are shown in Figures 7,8.

FIGURE 7

FIGURE 7. FFT result of the input voltage for load zone 1 (A) n=1 (B) n=2 (C) n=3 (D) n=4.

FIGURE 8

FIGURE 8. FFT result of the input current for load zone 1 (A) n=1 (B) n=2 (C) n=3 (D) n=4.

It can be seen from Figures 7,8 that the high content of the ripple frequency in the simulation results is basically consistent with the resonance point frequency in the Bode plot obtained from T_U(s) and T_I(s). When one load zone is connected to the system, the ripple content at the frequency of 470 Hz is the highest. When two load areas are connected to the system, there are two frequencies with higher ripple content, and their frequencies are 270 and 750 Hz, respectively. As the number of load zones increases, the types of ripples with higher content gradually increase, while the frequency of high-content ripples becomes lower.

6 Conclusion

This study analyzes the mechanism of power quality deterioration caused by the multi-load converter connected to the MVDC system. In this study, the load converter is modeled and analyzed by the state-space average method and the small-signal analysis method, and then, the impedance network model of the MVDC system is established. When the number of load converters changes, voltage and current on the input side of load area 1 are affected by the background harmonics. Finally, the influence of the number of load converters on power quality is analyzed. Two main conclusions are drawn:

(1) As the number of load converters increases, background harmonics are amplified in the MVDC system.

(2) The increase of load converters makes the MVDC system more susceptible to low-frequency background harmonics.

Data Availability Statement

The raw data supporting the conclusions of this article will be made available by the authors, without undue reservation.

Author Contributions

All authors listed have made a substantial, direct, and intellectual contribution to the work and approved it for publication.

Conflict of Interest

The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

Publisher’s Note

All claims expressed in this article are solely those of the authors and do not necessarily represent those of their affiliated organizations, or those of the publisher, the editors, and the reviewers. Any product that may be evaluated in this article, or claim that may be made by its manufacturer, is not guaranteed or endorsed by the publisher.

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