Optoelectronic integrated circuits for analog optical computing: Development and challenge
- 1Beijing University of Posts and Telecommunications (BUPT), Beijing, Beijing Municipality, China
- 2School of Science, Beijing University of Posts and Telecommunications, Beijing, China
A Corrigendum on
Optoelectronic integrated circuits for analog optical computing: Development and challenge
by Dan Y, Fan Z, Chen Q, Lai Y, Sun X, Zhang T and Xu K (2022). Front. Phys. 10:1064693. doi: 10.3389/fphy.2022.1064693
In the original article, there was an error in the caption of Figure 2, as some citations were missing. The corrected caption appears below:
“(A) The progresses of analog optical computing in the coherent integration platform. (B) Schematic of a Mach–Zehnder interferometer (MZI). (C) Schematic of a 4 × 4-port universal linear circuit [99]. (D) Schematic of Reck design and Clements design for the unitary implementation [100]. (E) Schematic of the optical interference unit (OIU) [44]. (F) Schematic of the “FFTUnitary” [46]. (G) Schematic of the complex-valued ONN [51]. (H) Schematic of the integrated chip diffractive neural network [103]. (I) Schematic of the pseudo-real-value matrix unitary MZI mesh [104]. (J) A robust architecture for universal unitary [111]. (G) Reprinted from Ref. 51 with permission from Springer Nature: Nature Communications. (H) Reprinted from Ref. 103 with permission from Springer Nature: Nature Communications. (I) Reprinted from Ref. 104 with permission from De Gruyter: Nanophotonics. (J) Reprinted from Ref. 111 with permission from American Physical Society: Physical Review Letters.”
In the original article, there were two errors in Figure 3. The first error was the number of the citation in Figure 3, panel (A), “Photonic tensor core based on PCM array [40]”. The second error was that some citations were missing in the caption. The corrected figure and its caption appear below:
FIGURE 3. (A) The progresses of analog optical computing in the incoherent integration platform. (B) Schematic of MRR-based optical matrix-vector multiplier [43]. (C) Schematic of an optical B&W network [114]. (D) An experimental setup concept of B&W network [115]. (E) Schematic of the all-optical spiking neural circuit [64]. (F) Schematic of the dot-product engine based on MRR [41]. (G) The principle of MRR-based complex-valued MVM [116]. (H) Schematic of the SOA-based weighted addition operation circuits [117]. (I) Schematic of the photonic tensor core [48]. (J) Schematic of the convolutional photonic computing core using PMCC array [118]. (K) The schematic of an N-input photonic neuron in the integrated end-to-end photonic deep neural network chip [52]. (G) Reprinted from Ref. 116 with permission from Springer: Frontiers of Optoelectronics. (J) Reprinted from Ref. 118 with permission from Springer Nature: Nature Communications.
In the original article, there was an error in the caption of Figure 4, as some citations were missing. The corrected caption appears below:
“(A) The progresses of analog optical computing in the space-propagation optical platform. (B) Schematic of the optical MVM model. (C) Schematic of the optical convolutional layer based on 4f system [47]. (D) Schematic of the linear operation in the all-optical neural network [120]. (E) The procedure for characterizing optical vector-vector dot products [121]. (F) Schematic of the optical recurrent neural network using SLM and DOE [74]. (G) Schematic of the diffractive deep neural network [63]. (H) Schematic of the reconfigurable diffractive processing unit (DPU) [123]. (I) An array of programmable metasurfaces for constructing the programmable artificial intelligence machine [124]. (J) The working principle of the on-chip multiplexed diffractive neural network [125]. (K) Principle of the spatial-photonic Ising machine [88]. (C) Reprinted from Ref. 47 with permission from Springer Nature: Scientific Reports. (E) Reprinted from Ref. 121 with permission from Springer Nature: Nature Communications. (J) Reprinted from Ref. 125 with permission from Springer Nature: Light|Science and Applications.”
In the original article, there was an error in the caption of Figure 5, as some citations were missing. The corrected caption appears below:
“The progresses of analog optical computing in the optical fiber platform. (B) Experimental set-up of the optoelectronic RC based on a single non-linear node and a delay line [53]. (C) Schematic of the optoelectronic implementation of RC [78]. (D) Schematic of the all-optical RC using the SOA as non-linearity [65]. (E) Schematic of the setup for delay-based RC using a photonic integrated circuit as non-linearity [79]. (F) The experimental setup of the MRR-based RC [54]. (G) The principle of generating artificial Ising spins based on DOPOs [49]. (H) Schematic of the setup of the coherent Ising machine with measurement and feedback [84]. (I) Schematic of the coherent Ising machine by using PPLN to form the time-division-multiplexed pulsed DOPOs [85]. (J) The principle of the time-stretch electro-optical neural network [135]. (K) The working principle of the photonic convolutional accelerator [18]. (F) Reprinted from Ref. 54 with permission from Springer Nature: Scientific Reports.”
In the original article, there was an error in the caption of Figure 6, as some citations were missing. The corrected caption appears below:
“(A) The principle of the simulating and mapping (S&M) method. (B) The workflow of the forward propagation method for in situ training of ONNs. (C) The workflow of in situ backpropagation and gradient measurement in MZI-based ONNs [157]. (D) The in situ training of diffractive optical neural networks via backpropagation [159]. (E) The principle of in situ training of ONNs via neuroevolution [161].”
In the original article, there was an error in the caption of Figure 7, as some citations were missing. The corrected caption appears below:
“(A) The concept of the neuromorphic photonic processor with commercially available photonic packaging technology and some emerging ideas in the field of integrated photonics [38]. (B) The schematic and workflow of an electro-photonic computing system [163]. (C) The principle of the hardware error correction in large-scale MZI networks [165]. (D) The schematic of the space-efficient optical integrated diffractive neural networks [103]. (B) Reprinted from Ref. 163 with permission from arXiv preprint. (D) Reprinted from Ref. 103 with permission from Springer Nature: Nature Communications.”
The authors apologize for these errors and state that this does not change the scientific conclusions of the article in any way. The original article has been updated.
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Keywords: optoelectronics, optical computing, optical neural networks, artificial intelligence, neuromophic computing, ising machine, reservoir computing (RC), photonic integrated chip
Citation: Dan Y, Fan Z, Chen Q, Lai Y, Sun X, Zhang T and Xu K (2023) Corrigendum: Optoelectronic integrated circuits for analog optical computing: Development and challenge. Front. Phys. 10:1115461. doi: 10.3389/fphy.2022.1115461
Received: 04 December 2022; Accepted: 15 December 2022;
Published: 10 January 2023.
Edited and reviewed by:
Hongda Chen, Institute of Semiconductors (CAS), ChinaCopyright © 2023 Dan, Fan, Chen, Lai, Sun, Zhang and Xu. This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) and the copyright owner(s) are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms.
*Correspondence: Tian Zhang, enRpYW5AYnVwdC5lZHUuY24=