SPICE Behaviors of Double Memristor Circuits Using Cosine Window Function

In this paper, a Hewlett-Packard (HP) memristor model with a new window function and its versatile characteristics are presented. SPICE behaviors of the linear and nonlinear memristor model are studied through PSpice simulation. High flexibility is demonstrated for emulating the behaviors of the practical HP memristors. Furthermore, the characteristics of the composite SPICE behaviors are both investigated when two memristors are connected in series and in parallel. The polarity of each memristor is also taken into consideration. The relationships among flux, charge, voltage, current, and memristance of the double memristor circuits are simulated and analyzed.

1 Introduction

There are three fundamental two-terminal passive circuit elements, i.e., resistors R, capacitors C and inductors L, which can be found and introduced from any basic circuit books. Chua first theoretically postulated the existence of the fourth passive electrical circuit element in 1971 [1], named as memristor, whose memristance (i.e., an acronym for memory resistance) M can be defined by the relation of magnetic flux $\phi$ and electrical charge q, namely, $M=d\phi /dq$. Together with the definitions of three commonly used basic circuit elements R, C and L, and definitions of the electric current and Faraday’s law, memristance closes the loop among four variables v, i, $\phi$ and q with six equations. Under the linear situation of memristor, M is seen as a constant and memristance is the same as the resistance. In fact, the memristance depends on the amount of charge that passed through the memristor, resembling a resistor with time-varying resistance.

No great progress was developed in the research field of memristor until the group of Williams at Hewlett-Packard (HP) lab successfully fabricated the first nanoscale memristive device based on titanium dioxide thin film in 2008 [2]. Since then, many researchers or scholars have focused on the memristor research [3–7] and its numerous potential applications in nonvolatile random access memories [8, 9], neuromorphic systems [10, 11], chaotic circuits [12], reconfigurable logics [13, 14] and RF/microwave devices [15, 16].

In order to emulate these memristor applications, various memristor nonlinear drift models using SPICE have been presented before fabricated realization [17–24]. Window functions need to be used to tackle the boundary conditions of the memristors [17–22]. In ref. 17, a switching window function was proposed, where the current i is involved, but it has limited scalability. Two different window functions were presented to mimic nonlinear effects in refs. 18 and 20. However, as the boundary between the doped and undoped layers approaches either end of the memristive device, it cannot be excited by external stimulus. In refs. 20 and 22, the piecewise functions were utilized to construct the window functions, which were relatively complicated when applying in the memristive devices.

In this paper, a memristor model using a new window function, called cosine window function, is proposed along with its versatile characteristics. To illustrate the significance of the proposed window function, main characteristics of state-of-the-art ones in recent years are listed in Table 1 for comparisons. Then, the SPICE behaviors of the linear and nonlinear memristor model are investigated through PSpice simulation. Furthermore, the characteristics of the composite SPICE behaviors are both studied when two memristors are connected in series and in parallel. The relationships among flux, charge, voltage, current, and memristance are simulated and analyzed using PSpice.

TABLE 1

TABLE 1. Comparisons of some reported window function in memristor models.

2 Memristor Model Using Cosine Window Function

The concept of memristive devices or systems was generalized by Chua and Kang using the following equations [25],

$v\left(t\right)=M\left(x\left(t\right),i\left(t\right)\right)\cdot i\left(t\right)(1)$

$\frac{dx\left(t\right)}{dt}=f\left(x\left(t\right),i\left(t\right)\right)(2)$

where v is the voltage, i is the current, and $M(x\left(t\right),i\left(t\right))$ is the instantaneous memristance that depends on the internal state variable x and current i of the memristor. The state variable x, ranging from 0 to 1, is the normalized width of the memristor doped region $x\left(t\right)=w\left(t\right)/D$, with D being the whole switching bilayer thickness of the memristor, as seen in Figure 1.

FIGURE 1

FIGURE 1. Memristor model and symbol.

At time t, the width of the doped region w depends on the amount of charge that passed through the memristor. Thus, the time derivative of w is proportional to the current i, which can be expressed by

$\frac{dw\left(t\right)}{dt}={\mu }_v\frac{R_{ON}}{D}i\left(t\right)(3)$

where ${\mu }_v$ is the average dopant mobility, $R_{ON}$ denotes the low resistance at high dopant concentration region. If we set $k={\mu }_v{R}_{ON}/D^2$, Eq. 3 can be changed as follows,

$\frac{dx\left(t\right)}{dt}=k\cdot i\left(t\right)(4)$

The Eqs. 3, 4 is actually an expression of a linear drift model of memristor, but it does not take the boundary effects of the memristor into account. Nonlinear dopant drift phenomena exist at the boundaries of the physically realized nanoscale memristor, therefore, an appropriate window function f(x) need to be introduced in ref. 4, i.e.,

$\frac{dx\left(t\right)}{dt}=k\cdot f\left(x\right)\cdot i\left(t\right)(5)$

where f(x) ensures zero drift at the boundaries, i.e., f (0) = f (1) = 0.

On the other hand, the memristance can be expressed by

$M=R_{ON}\cdot x\left(t\right)+R_{OFF}\left(1-x\left(t\right)\right)(6)$

where $R_{OFF}$ denotes the high resistance at low dopant concentration region. In this paper, a new cosine window function is proposed as follows,

$f\left(x\right)=1-{\left(\cos \left(\pi x\right)\right)}^{20\cdot p}(7)$

where p is the control parameter. This new and simple cosine window function is demonstrated in Figure 2 for various values of p. As the parameter p rises, a unity window function f(x) will occur, and thus the model tends to a linear model. Here, the parameter p is set with a large range of variation, because the cosine window function is not changed significantly near the region of boundary.

FIGURE 2

FIGURE 2. Proposed window function versus state variable with various p.

Using this new cosine window function, the behaviors of the memristor can be observed in Figures 3–6 with versatile characteristics. Here, we set $R_{ON}$= 100 Ω, $R_{OFF}$= 16 kΩ, w₀ = 5 nm, D = 10 nm, and ${\mu }_v$ = 10^{–14 m2}/Vs, thus the initial state variable x₀ is equal to 0.5 at t = 0. When the voltage biased at two sides of memristor is set as $v\left(t\right)=\sin \left(2\pi t\right)$, i.e., the frequency of the AC voltage f = 1 Hz, the calculated dynamical properties of the normalized doped state variable $x\left(t\right)$ with different values of p are illustrated in Figure 3A. For instance, when p = 16, the state variable periodically saturates between the normalized boundary “1” from 0.295 + N to 0.705 + N s, where N is a natural number starting from 0. On the other hand, according to (6), the curves of the corresponding memristances can be obtained as seen in Figure 3B. When the memristor biased voltage is set as $v\left(t\right)=-\sin \left(2\pi t\right)$, the calculated dynamical properties of the normalized doped state variable $x\left(t\right)$ with different values of p is shown in Figure 3C, and the corresponding memristance curves are plotted in Figure 3D.

FIGURE 3

FIGURE 3. Time dependence of (A) the state variable and (B) memristance with voltage sinusoidal stimulus of $v\left(t\right)=\sin \left(2\pi t\right)$, and (C) the state variable and (D) memristance with voltage sinusoidal stimulus of $v\left(t\right)=-\sin \left(2\pi t\right)$ for various p.

Actually, the minimum state variable $x\left(t\right)$ corresponding to maximum memristance is dependent on the frequency of the biased AC voltage. From Figure 3C, we can see that the state variable does not arrive the normalized boundary “0”. Through decreasing the frequency of the biased voltage, two edge states, i.e., saturation (w = D) and depletion (w = 0), can be reached when the memristor device is biased with positive voltage sinusoidal stimulus and reversed polarity stimulus, respectively. Figure 4 shows the influence of the frequency variation of the biased voltage on the state variable x and memristance M. As the frequency of the AC voltage f decreases from 1 Hz to 1/3 Hz, the minimum value of state variable x will approach 0 and the corresponding maximum memristance will be 16 kΩ, under the condition of p = 8.

FIGURE 4

FIGURE 4. Influence of the frequency variation of the biased voltage on the time-varying (A) state variable and (B) memristance.

Figure 5 illustrates a nonlinear calculated current-voltage (i-v) curve with p set as 8, where a periodic pinched hysteresis loop with hard switching emerges. This memristive model has zero-crossing property in a form of i-v Lissajous figure, which represents no current through the system when the voltage value is zero. Figure 6 shows the versatility of our model, where the i-v characteristic curves are plotted for eight different values of p. This model demonstrates high flexibility for emulating the behaviors of the practical HP memristors, which can be beneficial in characterizing memristive devices before fabrication.

FIGURE 5

FIGURE 5. Calculated i-v characteristic of our proposed memristor with p = 8. The inset is the nonlinear single-valued function between charge and magnetic flux.

FIGURE 6

FIGURE 6. Calculated log(i)-v curves of our proposed memristor with various p. * Memristor Model.

3 SPICE Behaviors of Double Memristor Circuits

The HP memristor model using cosine window function and its characteristics have been addressed in the above section. To further investigate the relationships among charge, flux, and memristance of composite memristors connected in different topologies, simulated SPICE behaviors of single and double memristor circuits will be presented in details in this section.

3.1 SPICE Behaviors of Single Memristor

The single memristor circuit using the above-mentioned cosine window function has been proposed, and the corresponding SPICE code was written for use in PSpice [26], as seen in Figure 7. The single memristor’s SPICE behaviors can be seen in Figures 8, 9, 10, where the initial state of the linear and nonlinear memristor models are both M(0) = 15.9 kΩ with a sinusoidal input signal of $v\left(t\right)=Vm\sin \left(2\pi t\right)$. The behaviors in Figures 9, 10 are plotted together with those of two serial memristor circuits for comparisons, which will be introduced in subsection B.

FIGURE 7

FIGURE 7. SPICE code of memristor subcircuit for use in PSpice.

FIGURE 8

FIGURE 8. (A) Memristance versus charge curves and (B) flux versus charge curves for the linear and nonlinear model of memristor.

FIGURE 9

FIGURE 9. Two serial memristor circuits with (A) same polarities, and (B) opposite polarities.

FIGURE 10

FIGURE 10. (A) Current versus voltage curves, (B) memristance versus charge curves, and (C) flux versus charge curves of the single memristor and two memristors in series with opposite polarities.

As shown in Figure 8A, when the value of p increases, the curves of the nonlinear models will be toward that of linear model, which means that the nonlinearity will be weakened. At the middle area of the whole charging process, the slopes of all the curves with various p are identical including that of the linear model. In Figure 8B, as the value of p increases for a fixed electrical charge, the magnetic flux will decrease, i.e., the nonlinearity will be weakened.

3.2 SPICE Behaviors of Two Serial Memristor Circuits

Then, we construct a circuit with two nonlinear memristors (p = 8), in series with same polarities in PSpice as shown in Figure 11A. The initial states of these two memristors are both M(0) = 11.25 kΩ. Due to the movement of the doping ions caused by the bias voltage, the memristance associated with the doping boundary in the HP model definition will be changed accordingly. Therefore, when the magnitude V_m of the sinusoidal input signal $v\left(t\right)=Vm\sin \left(2\pi t\right)$ is positive, the memristance will keep decreasing, and vice versa. Simultaneously, the value of V_m will influence the migration rate of doping ions.

FIGURE 11

FIGURE 11. (A) Current versus voltage curves, (B) memristance versus charge curves, and (C) flux versus charge curves of the single memristor and twomemristors in series with same polarities.

Figure 9A shows the relationships between voltage and current of the single memristor (M₁ or M₂) and two serial memristors with same polarities in Figure 11A, where the magnitude of the sinusoidal input signal V_m = 2.3V. Due to the two memristors connected in series, equal current flows through both memristors. Therefore, the behaviors of each single memristor are identical. Moreover, the applied voltage is distributed across each memristor identically at any instant of time due to same polarities of these two memristors M₁ and M₂. Consequently, the slope of pinched hysteresis loop of the composite memristor circuit is half of that of the single memristor.

Figures 9B,C illustrate the curves of memristance versus charge (M-q) and flux versus charge ($\phi$-q), respectively. In Figure 9B, the stored charge q in the memristor will be gradually increased as the memristance M decreases. The slope of the M-q curve of the single memristor is half of that of the composite memristor circuit. Meanwhile, the memristance M of the single memristor is always half of that of the composite memristor circuit at any time. When the memristance M decreases to the value of $R_{ON}$, namely, approaching the doping boundary of the memristor at high dopant concentration region, it will keep “ON” of this memristor even if the charge increases. Similarly, the slope of the $\phi$-q curve of the single memristor is also half of that of the composite memristor circuit, as shown in Figure 9C.

For a two-serial-memristor circuit with opposite polarities in PSpice shown in Figure 11B, the current versus voltage curves of the individual memristors and two serial memristors are plotted in Figure 10A. The initial states of the two memristances are both set as M(0) = 11.25 kΩ in PSpice software. In contrast to the case of the same polarities in Figures 9A, 10A has three separate hysteresis loops, denoting the individual memristor M₁, M₂ and composite M of the two memristors. Due to the two memristors connected with opposite polarities, they have the opposite variations. The specific expression is that when the memristance M₁ decreases, the other memristance M₂ will increase, and vice versa.

Figure 10B shows the relationship between memristance and charge. The initial memristances of M₁ and M₂ are both M(0) = 11.25 kΩ. Therefore, the memristance of composite M is 22.5 kΩ at first. In the linear region, the amplitude changes of the two memristors are identical, but the trends are opposite. Therefore, the memristance of composite M remains unchanged. When the shift is close to the boundary, memristors are in the nonlinear region. Thus, the memristance of composite M will decrease accordingly. This phenomenon is caused from the boundary effects in physical memristor model. At this time, the two memristors reach the minimum and maximum memristances, respectively, resulting in the composite memristance of approximately 16 kΩ. For the relationship between flux and charge in Figure 10C, it is also different from that of Figure 9C. The magnetic fluxes of M₁ and M₂ are not the same any more due to the two memristors connected with opposite polarities. In Figure 10C, the slope of composite flux in black is always equal to the arithmetic sum of the two slopes of individual memristor fluxes. Moreover, the composite flux is varied more linearly as a function of charge, compared with those of the individual memristor fluxes.

3.3 SPICE Behaviors of Two Parallel Memristor Circuits

Similarly, the parallel circuits of two nonlinear memristors (p = 8) are constructed in PSpice, where the initial states of the memristiors are M₁(0) = M₂ (0) = 11.25 kΩ. Since the two memristors are connected in parallel with same and opposite polarities as shown in Figures 12A,B, respectively, equal voltage passes through the two memristors, where the magnitude V_m of the sinusoidal input signal is set as 1.15V.

FIGURE 12

FIGURE 12. Two parallel memristor circuits with (A) same polarities, and (B) opposite polarities.

The relationships between voltage and current of the single memristor (M₁ or M₂) and two memristors in parallel with same polarities are shown in Figure 13A. Since the initial states of the two memristors are identical, the applied voltage is distributed across each memristor equally at any instant of time. Hence, the behaviors of each single memristor are identical. In addition, the slope of pinched hysteresis loop of the composite memristor circuit is twice as big as that of the single memristor.

FIGURE 13

FIGURE 13. (A) Current versus voltage curves, (B) memristance versus flux curves, and (C) charge versus flux curves of the single memristor and two memristors in parallel with same polarities.

Figure 13B exhibits the variations of memristance versus flux (M-φ). In contrast to composite memristor circuit in series, the memristance of composite memristor circuit in parallel is half of that of the individual memristor at any instant of flux. As the memristance decreases, the magnetic flux will rise accordingly and its variations (i.e., slopes) for single memristor and composite memristor circuit are both increasingly large until the memristance reaches the minimum value. Figure 13C plots the charge versus flux (q-φ) curves of the single memristor and two memristors in parallel with same polarities. Seen from Figure 13C, the slope of the q-φ curve of the single memristor is also half of that of the composite memristor circuit.

For a double memristor circuit connected in parallel with opposite polarities shown in Figure 12B, the curves of current versus voltage are plotted in Figure 14A. It has three different hysteresis loops in contrast to the case of the same polarities in Figure 13A. The inset of Figure 14A shows that the curve of M₂ has a relatively linear hysteresis loop compared with those of the other two. However, the composite current is always equal to the sum of the individual branch currents of the two memristors at any time whatever the applied voltage is.

FIGURE 14

FIGURE 14. (A) Current versus voltage curves, (B) memristance versus flux curves, and (C) charge versus flux curves of the single memristor and two memristors in parallel with opposite polarities.

The curves of memristance versus flux (M-φ) and charge versus flux (q-φ) are plotted in Figures 14B,C, respectively. As seen in Figure 14B, the variation trends of the two individual memristors M₁ and M₂ are opposite, due to opposite polarities of these two memristors. Additionally, the composite memristance is always lower than the memristance of each single memristor at any time. Seen from Figure 14C, it can be found that the q-φ curves of the two individual memristors with opposite polarities are symmetrical about the initial origin point. Moreover, the slope of composite charge is always equal to the arithmetic sum of the two slopes of individual memristor charges.

4 Conclusion

A new window function has been created and applied into the HP memristor model in this paper. To validate its advantages, versatile characteristics and SPICE behaviors of the memristor have been demonstrated. Moreover, we also investigate the composite SPICE behaviors when two memristors are connected in series and in parallel with same or opposite polarities, and make comparisons with those of the individual memristors. Their relationships among flux, charge, voltage, current, and memristance are analyzed using PSpice simulation.

Data Availability Statement

The raw data supporting the conclusions of this article will be made available by the authors, without undue reservation.

Author Contributions

All authors listed have made a substantial, direct, and intellectual contribution to the work and approved it for publication.

Funding

This work was supported in part by the FY2019 JSPS Postdoctoral Fellowship for Research in Japan under Grant P19350, Grant-in-Aid for JSPS Research Fellow under Grant JP19F19350, National Natural Science Foundation of China under Grant 61601390, Opening project of Key Laboratory of Cognitive Radio and Information Processing under Grant CRKL180202, Natural Science Foundation of Guangxi under Grant 2019GXNSFFA245002, and Dean Project of Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing under Grant GXKL06190118.

Conflict of Interest

The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

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